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SG2543 PDF预览

SG2543

更新时间: 2024-02-22 23:12:06
品牌 Logo 应用领域
美高森美 - MICROSEMI 输出元件监控
页数 文件大小 规格书
6页 121K
描述
POWER SUPPLY OUTPUT SUPERVISORY CIRCUIT

SG2543 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, DIP-16Reach Compliance Code:unknown
风险等级:5.75可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDIP-T16
JESD-609代码:e0信道数量:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-25 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:4.5/40 V
认证状态:Not Qualified子类别:Power Management Circuits
最大供电电流 (Isup):10 mA最大供电电压 (Vsup):40 V
最小供电电压 (Vsup):4.7 V标称供电电压 (Vsup):10 V
表面贴装:NO技术:BIPOLAR
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

SG2543 数据手册

 浏览型号SG2543的Datasheet PDF文件第1页浏览型号SG2543的Datasheet PDF文件第2页浏览型号SG2543的Datasheet PDF文件第4页浏览型号SG2543的Datasheet PDF文件第5页浏览型号SG2543的Datasheet PDF文件第6页 
SG1543/SG2543/SG3543  
ELECTRICAL CHARACTERISTICS (continued)  
SG1543/2543  
Min. Typ. Max. Min. Typ. Max.  
SG3543  
Parameter  
Test Conditions  
Units  
Comparator Section  
Input Threshold (Note 5)  
TJ = 25°C  
2.45 2.50 2.55 2.40 2.50 2.60  
V
V
2.40  
2.60 2.35  
2.65  
Input Hysteresis  
25  
0.3 1.0  
0.2 0.5  
6
25  
0.3 1.0  
0.2 0.5  
6
mV  
µA  
V
V
µA  
Input Bias Current  
Delay Saturation  
Delay High Level  
Delay Charging Current  
Indicate Saturation  
Indicate Leakage  
Propagation Delay  
Sense input = 0V  
8
8
VD = 0V  
IL = 10mA  
VIND = 40V  
200 250 300 200 250 300  
0.2 0.5  
.01 1.0  
0.2 0.5  
0.1 1.0  
V
µA  
V
O.V. INPUT = 2.7V, VU.V. INPUT = 2.3V, TJ = 25°C  
C = 0  
CD = 1µF  
400  
10  
400  
10  
ns  
ms  
D
SCR Trigger Section  
Peak Output Current  
Peak Output Voltage  
Output Off Voltage  
Remote Activate Current  
Remote Activate Voltage  
Reset Current  
+V = 5V, RG = 0, VO = 0  
100 200  
400 100 200 400  
mA  
V
V
mA  
V
mA  
V
mA/µs  
ns  
IN  
+V = 15V, IO = 100mA  
12  
13  
0
12  
13  
IN  
+V = 40V, RL = 1KΩ  
0.1  
0
0.4  
2
0.4 0.8  
2
0.1  
0.8  
6
IN  
REM. ACT. pin = Gnd  
REM. ACT pin open  
RESET pin = Gnd, REM. ACT. = Gnd  
RESET pin open, REM. ACT. = Gnd  
RL = 50, TJ = 25°C, CD = 0  
VREM. ACT. = 0.4V  
0.4 0.8  
2
0.4  
2
400  
300  
500  
6
0.8  
6
Reset Voltage  
6
Output Current Rise Time  
Prop. Delay from REM. ACT. Pin  
Prop. Delay fom O.V. INPUT Pin  
400  
300  
500  
V
O.V. INPUT = 2.7V  
ns  
Current Limit Section  
Input Voltage Range  
Input Bias Current  
VIN-3V  
0.3 1.0  
10  
0
0
VIN-3V  
0.3 1.0  
15  
V
µA  
mV  
mV  
dB  
dB  
V
µA  
MHz  
ns  
OFFSET/COMP pin open, VCM = 0V  
OFFSET/COMP pin open, VCM = 0V,  
Input Offset Voltage  
0
0
10kfrom OFFSET/COMP pin to Gnd,TJ =25°C 80 100 120 70 100 130  
CMRR  
AVOL  
Output Saturation  
Output Leakage  
Small Signal Bandwidth  
Propagation Delay  
0 VCM 12V, VIN = 15V  
OFFSET/COMP pin open, VCM = 0V  
IL = 10mA  
60  
72  
70  
80  
60  
72  
70  
80  
0.2 0.5  
.01 1.0  
5
0.2 0.5  
.01 1.0  
5
VIND = 40V  
AV = 0dB, TJ = 25°C  
VOVERDRIVE = 100mV, TJ = 25°C  
200  
200  
Note 5. Input voltage rising on O.V. Input and falling on U.V. Input.  
CHARACTERISTIC CURVES  
FIGURE 2 .  
ACTIVATION DELAY VS. CAPACITOR VALUE  
FIGURE 1.  
SCR TRIGGER POWER LIMITING  
11/91 Rev 1.1 2/94  
LINFINITY Microelectronics Inc.  
Copyright 1994  
11861 Western Avenue Garden Grove, CA 92841  
3
(714) 898-8121 FAX: (714) 893-2570  

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