5秒后页面跳转
捷配首页

Datasheet > SCANSTA111SMX/NOPB
SCANSTA111SMX/NOPB PDF预览

SCANSTA111SMX/NOPB

更新时间： 2024-01-12 00:14:02
品牌 Logo 应用领域
德州仪器 - TI 外围集成电路
页数 文件大小 规格书
38页 1312K
描述
SCANSTA111 Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port

阅读下载

中文翻译

获取价格

SCANSTA111SMX/NOPB 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：LFBGA, BGA49,7X7,32Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.07JESD-30 代码：S-PBGA-B49
JESD-609代码：e1长度：7 mm
湿度敏感等级：4端子数量：49
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装等效代码：BGA49,7X7,32封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
座面最大高度：1.5 mm子类别：Other Microprocessor ICs
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：40宽度：7 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUITBase Number Matches：1

SCANSTA111SMX/NOPB 数据手册

 浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第2页浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第3页浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第4页浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第5页浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第6页浏览型号SCANSTA111SMX/NOPB的Datasheet PDF文件第7页 
SCANSTA111  
www.ti.com  
SNLS060K –AUGUST 2001–REVISED APRIL 2013  
SCANSTA111 Enhanced SCAN Bridge  
Multidrop Addressable IEEE 1149.1 (JTAG) Port  
Check for Samples: SCANSTA111  
1
FEATURES  
DESCRIPTION  
The SCANSTA111 extends the IEEE Std. 1149.1 test  
2
•
True IEEE 1149.1 Hierarchical and Multidrop  
Addressable Capability  
bus into a multidrop test bus environment. The  
advantage of a multidrop approach over a single  
serial scan chain is improved test throughput and the  
ability to remove a board from the system and retain  
test access to the remaining modules. Each  
SCANSTA111 supports up to 3 local IEEE 1149.1  
scan rings which can be accessed individually or  
combined serially. Addressing is accomplished by  
loading the instruction register with a value matching  
that of the Slot inputs. Backplane and inter-board  
testing can easily be accomplished by parking the  
local TAP Controllers in one of the stable TAP  
Controller states via a Park instruction. The 32-bit  
TCK counter enables built in self test operations to be  
performed on one port while other scan chains are  
simultaneously tested.  
•
The 7 Slot Inputs Support Up to 121 Unique  
Addresses, an Interrogation Address,  
Broadcast Address, and 4 Multi-Cast Group  
Addresses (Address 000000 is Reserved)  
•
•
3 IEEE 1149.1-Compatible Configurable Local  
Scan Ports  
Mode Register0 Allows Local TAPs to be  
Bypassed, Selected for Insertion Into the Scan  
Chain Individually, or Serially in Groups of  
Two or Three  
•
Transparent Mode can be Enabled with a  
Single Instruction to Conveniently Buffer the  
Backplane IEEE 1149.1 Pins to those on a  
Single Local Scan Port  
•
•
LSP ACTIVE Outputs Provide Local Port  
Enable Signals for Analog Busses Supporting  
IEEE 1149.4.  
General Purpose Local Port Pass-Through Bits  
are Useful for Delivering Write Pulses for  
FPGA Programming or Monitoring Device  
Status.  
•
•
•
•
•
Known Power-Up State  
TRST on All Local Scan Ports  
32-Bit TCK Counter  
16-Bit LFSR Signature Compactor  
Local TAPs can become TRI-STATE via the OE  
Input to Allow an Alternate Test Master to Take  
Control of the Local TAPs (LSP0-2 Have a TRI-  
STATE Notification Output)  
•
•
•
3.0-3.6V VCC Supply Operation  
Power-Off High Impedance Inputs and Outputs  
Supports Live Insertion/Withdrawal  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2013, Texas Instruments Incorporated  
1234567...38

中文翻译

下载PDF

与SCANSTA111SMX/NOPB相关器件

型号 品牌 描述 获取价格 数据表
SCANSTA112 NSC 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer

获取价格
SCANSTA112 TI 7 端口多点 IEEE 1149.1 (JTAG) 多路复用器

获取价格
SCANSTA112_05 NSC 7-Port Multidrop IEEE 1149.1 (JTAG) Multiplexer

获取价格
SCANSTA112SM NSC 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer

获取价格
SCANSTA112SM TI 7 端口多点 IEEE 1149.1 (JTAG) 多路复用器 | NZD | 100 |

获取价格
SCANSTA112SM/NOPB TI 7 端口多点 IEEE 1149.1 (JTAG) 多路复用器 | NZD | 100 |

获取价格

与SCANSTA111SMX/NOPB相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证