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SC16C554DIB64,151

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品牌 Logo 应用领域
恩智浦 - NXP 通信时钟数据传输外围集成电路
页数 文件大小 规格书
55页 258K
描述
SC16C554DIB64

SC16C554DIB64,151 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:64
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.74其他特性:OPERATES AT 2.25 V MINIMUM SUPPLY
地址总线宽度:5边界扫描:NO
最大时钟频率:80 MHz通信协议:ASYNC, BIT
最大数据传输速率:0.625 MBps外部数据总线宽度:8
JESD-30 代码:S-PQFP-G64长度:10 mm
低功率模式:YES串行 I/O 数:4
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.6 mm最大供电电压:3.63 V
最小供电电压:2.97 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

SC16C554DIB64,151 数据手册

 浏览型号SC16C554DIB64,151的Datasheet PDF文件第49页浏览型号SC16C554DIB64,151的Datasheet PDF文件第50页浏览型号SC16C554DIB64,151的Datasheet PDF文件第51页浏览型号SC16C554DIB64,151的Datasheet PDF文件第52页浏览型号SC16C554DIB64,151的Datasheet PDF文件第53页浏览型号SC16C554DIB64,151的Datasheet PDF文件第54页 
SC16C554/554D  
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder  
Philips Semiconductors  
Contents  
1
2
3
4
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
12  
12.1  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
Introduction to soldering surface mount  
packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 50  
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 50  
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 51  
Package related soldering information. . . . . . 51  
12.2  
12.3  
12.4  
12.5  
5
5.1  
5.1.1  
5.1.2  
5.1.3  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 5  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
PLCC68 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
LQFP64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
LQFP80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9  
13  
14  
15  
16  
Revision history . . . . . . . . . . . . . . . . . . . . . . . 53  
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 54  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 54  
6
Functional description . . . . . . . . . . . . . . . . . . 13  
Interface options . . . . . . . . . . . . . . . . . . . . . . . 14  
The 16 mode interface . . . . . . . . . . . . . . . . . . 14  
The 68 mode interface . . . . . . . . . . . . . . . . . . 14  
Internal registers. . . . . . . . . . . . . . . . . . . . . . . 15  
FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . 15  
Hardware flow control. . . . . . . . . . . . . . . . . . . 16  
Software flow control . . . . . . . . . . . . . . . . . . . 16  
Special feature software flow control . . . . . . . 17  
Hardware/software and time-out interrupts. . . 17  
Programmable baud rate generator . . . . . . . . 18  
DMA operation . . . . . . . . . . . . . . . . . . . . . . . . 19  
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Loop-back mode. . . . . . . . . . . . . . . . . . . . . . . 19  
6.1  
6.2  
6.3  
6.4  
6.5  
6.6  
6.7  
6.8  
6.9  
6.10  
6.11  
6.12  
6.13  
7
7.1  
Register descriptions . . . . . . . . . . . . . . . . . . . 22  
Transmit (THR) and Receive (RHR)  
Holding Registers . . . . . . . . . . . . . . . . . . . . . 23  
Interrupt Enable Register (IER) . . . . . . . . . . . 23  
IER versus Receive FIFO interrupt  
7.2  
7.2.1  
mode operation . . . . . . . . . . . . . . . . . . . . . . . 24  
IER versus Receive/Transmit FIFO polled  
7.2.2  
mode operation . . . . . . . . . . . . . . . . . . . . . . . 24  
FIFO Control Register (FCR) . . . . . . . . . . . . . 25  
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Interrupt Status Register (ISR) . . . . . . . . . . . . 27  
Line Control Register (LCR) . . . . . . . . . . . . . . 28  
Modem Control Register (MCR) . . . . . . . . . . . 30  
Line Status Register (LSR). . . . . . . . . . . . . . . 31  
Modem Status Register (MSR). . . . . . . . . . . . 32  
Scratchpad Register (SPR) . . . . . . . . . . . . . . 33  
Enhanced Feature Register (EFR) . . . . . . . . . 33  
SC16C554/554D external reset conditions. . . 35  
7.3  
7.3.1  
7.3.2  
7.4  
7.5  
7.6  
7.7  
7.8  
7.9  
7.10  
7.11  
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 35  
Static characteristics. . . . . . . . . . . . . . . . . . . . 36  
Dynamic characteristics . . . . . . . . . . . . . . . . . 37  
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . 38  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 47  
9
10  
10.1  
11  
© Koninklijke Philips Electronics N.V. 2004.  
Printed in the U.S.A.  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 10 May 2004  
Document order number: 9397 750 13132  

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