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SC16C550BIA44-T PDF预览

SC16C550BIA44-T

更新时间: 2024-10-03 12:58:15
品牌 Logo 应用领域
恩智浦 - NXP 微控制器和处理器串行IO控制器通信控制器外围集成电路先进先出芯片数据传输PC时钟
页数 文件大小 规格书
48页 240K
描述
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs

SC16C550BIA44-T 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅: 含铅
是否Rohs认证: 符合生命周期:Obsolete
包装说明:QCCJ, LDCC44,.7SQReach Compliance Code:unknown
风险等级:5.74JESD-30 代码:S-PQCC-J44
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
电源:2.5/5 V认证状态:Not Qualified
子类别:Serial IO/Communication Controllers表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUADuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

SC16C550BIA44-T 数据手册

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SC16C550B  
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs  
Rev. 05 — 1 October 2008  
Product data sheet  
1. General description  
The SC16C550B is a Universal Asynchronous Receiver and Transmitter (UART) used for  
serial data communications. Its principal function is to convert parallel data into serial  
data, and vice versa. The UART can handle serial data rates up to 3 Mbit/s.  
The SC16C550B is pin compatible with the ST16C550, TL16C550 and PC16C550, and it  
will power-up to be functionally equivalent to the 16C450. The SC16C550B also provides  
DMA mode data transfers through FIFO trigger levels and the TXRDY and RXRDY signals  
(TXRDY and RXRDY are not supported in the HVQFN32 package). On-board status  
registers provide the user with error indications, operational status, and modem interface  
control. System interrupts may be tailored to meet user requirements. An internal  
loopback capability allows on-board diagnostics.  
The SC16C550B operates at 5 V, 3.3 V and 2.5 V, and the Industrial temperature range,  
and is available in plastic HVQFN32, DIP40, PLCC44 and LQFP48 packages.  
2. Features  
I 5 V, 3.3 V and 2.5 V operation  
I Industrial temperature range  
I After reset, all registers are identical to the typical 16C450 register set  
I Capable of running with all existing generic 16C450 software  
I Pin compatibility with the industry-standard ST16C450/550, TL16C450/550,  
PC16C450/550  
I Up to 3 Mbit/s transmit/receive operation at 5 V, 2 Mbit/s at 3.3 V, and 1 Mbit/s at 2.5 V  
I 5 V tolerant on input only pins1  
I 16 byte transmit FIFO  
I 16 byte receive FIFO with error flags  
I Programmable auto-RTS and auto-CTS  
N In auto-CTS mode, CTS controls transmitter  
N In auto-RTS mode, RX FIFO contents and threshold control RTS  
I Automatic hardware flow control  
I Software selectable baud rate generator  
I Four selectable Receive FIFO interrupt trigger levels  
I Standard modem interface  
I Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break)  
I Independent receiver clock input  
I Transmit, Receive, Line Status, and Data Set interrupts independently controlled  
1. For data bus pins D7 to D0, see Table 24 “Limiting values”.  

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