Datasheet > SC102203CPV

SC102203CPV

更新时间： 2023-04-15 00:00:00

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
142页	6530K
描述
16-BIT, FLASH, 25MHz, MICROCONTROLLER, PQFP112, LQFP-112

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SC102203CPV 数据手册

Device User Guide — 9S12DT128DGV2/D V02.15

Version Revision Effective

Author

Description of Changes

Number

Date

Added 3L40K mask set in section 1.6

Corrected register entries in section 1.5.1 “Detailed Memory Map”

Updated description for ROMCTL in section 2.3.31

Updated section 4.3.3 “Unsecuring the Microcontroller”

Corrected and updated device-speciﬁc information for OSC

(section 8.1) & Byteﬂight (section 15.1)

29 Jan

2003

29 Jan

2003

V02.07

Updated footnote in Table A-4 “Operating Conditions”

Changed reference of VDDM to VDDR in section A.1.8

Removed footnote on input leakage current in Table A-6 “5V I/O

Characteristics”

Added part numbers MC9S12DT128E, MC9S12DG128E, and

MC9S12DJ128E in “Preface” and related part number references

Removed mask sets 0L40K and 2L40K from Table 1-3

26 Feb

2003

26 Feb

2003

V02.08

Replaced references to HCS12 Core Guide by the individual

HCS12 Block guides in Table 0-2, section 1.5.1, and section 6;

updated Fig.3-1 “Clock Connections” to show the individual HCS12

blocks

Corrected PIM module name and document order number in Table

0-2 “Document References”

Corrected ECT pulse accumulators description in section 1.2

“Features”

Corrected KWP5 pin name in Fig 2-1 112LQFP pin assignments

Corrected pull resistor CTRL/reset states for PE7 and PE4-PE0 in

Table 2.1 “Signal Properties”

Mentioned “S12LRAE” bootloader in Flash section 17

Corrected footnote on clamp of TEST pin under Table A-1

“Absolute Maximum Ratings”

15 Oct

2003

15 Oct

2003

V02.09

Corrected minimum bus frequency to 0.25MHz in Table A-4

“Operating Conditions”

Replaced “burst programming” by “row programming” in A.3 “NVM,

Flash and EEPROM”

Corrected blank check time for EEPROM in Table A-11 “NVM

Timing Characteristics”

Corrected operating frequency in Table A-18 “SPI Master/Slave

Mode Timing Characteristics

Added A128 information in “Derivative Differences”, 2.1 “Device

Pinout”, 2.2 “Signal Properties Summary”, Fig 23-2 & Fig 23-4

Added lead-free package option (PVE) in Table 0-2 “Derivative

Differences for MC9S12DB128” and Fig 0-1 “Order Partnumber

Example”

6 Feb

2004

6 Feb

2004

V02.10

V02.11

Added an “AEC qualiﬁed” row in the “Derivative Differences” tables

0-1 & 0-2.

Added part numbers SC515846, SC515847, SC515848, and

SC515849 in “Derivative Differences” tables 0-1 & 0-2, section 2,

and section 23.

Corrected and added maskset 4L40K in tables 0-1 & 0-2 and

section 1.6.

3 May

2004

3 May

2004

Corrected BDLC module availability in DB128 80QFP part in

“Derivative Differences” table 0-2.

Freescale Semiconductor

1 2 345 6 7...142

中文翻译

下载PDF

与SC102203CPV相关器件

型号	品牌	描述	获取价格	数据表
SC102203MFU	NXP	16-BIT, FLASH, 25MHz, MICROCONTROLLER, PQFP80	获取价格
SC102203MPV	NXP	16-BIT, FLASH, 25MHz, MICROCONTROLLER, PQFP112, LQFP-112	获取价格
SC102204	FREESCALE	nullDevice User Guide	获取价格
SC102204MFU	NXP	16-BIT, FLASH, 25MHz, MICROCONTROLLER, PQFP80	获取价格
SC102204VFU	NXP	16-BIT, FLASH, 25MHz, MICROCONTROLLER, PQFP80	获取价格
SC102205	FREESCALE	nullDevice User Guide	获取价格