Datasheet > SAA5361HL/M1/1651

SAA5361HL/M1/1651

更新时间： 2022-05-16 23:30:24

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
28页	155K
描述
SAA5361HL/M1/1651 TSG0537/M1

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SAA5361HL/M1/1651 数据手册

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Philips Semiconductors

Product speciﬁcation

Multi page intelligent teletext decoder

SAA5360; SAA5361

SYMBOL

RESET

TYPE

DESCRIPTION

reset input; if HIGH for at least 24 crystal oscillator periods while the oscillator is

running, the device is reset; this pin should be connected to V_DDCvia a capacitor if

an active HIGH reset is required; internal pull-down

n.c.

100

−

not connected

V_DDP

3.3 V periphery supply voltage

P1_0

I/O

−

programmable bidirectional port 1: bit 0

not connected

n.c.

P1_1

I/O

programmable bidirectional port 1: bit 1

programmable bidirectional port 1: bit 2

programmable bidirectional port 1: bit 3

I²C-bus serial clock input from application

I²C-bus serial data input from or output to application

programmable bidirectional port 1: bit 4

programmable bidirectional port 1: bit 5

not connected

P1_2

P1_3

SCL

SDA

I/O

−

P1_4

P1_5

n.c.

−

not connected

n.c.

−

not connected

n.c.

−

not connected

n.c.

−

not connected

n.c.

−

not connected

n.c.

−

not connected

n.c.

−

not connected

P2_1/PWM0

P2_2/PWM1

P2_3/PWM2

P2_4/PWM3

P2_5/PWM4

P2_6/PWM5

V_SSC

I/O

−

programmable bidirectional port 2: bit 1 or output bit 0 of the 7-bit PWM

programmable bidirectional port 2: bit 2 or output bit 1 of the 7-bit PWM

programmable bidirectional port 2: bit 3 or output bit 2 of the 7-bit PWM

programmable bidirectional port 2: bit 4 or output bit 3 of the 7-bit PWM

programmable bidirectional port 2: bit 5 or output bit 4 of the 7-bit PWM

programmable bidirectional port 2: bit 6 or output bit 5 of the 7-bit PWM

core ground

P2_0/TPWM

I/O

programmable bidirectional port 2: bit 0 or output for 14-bit high precision PWM

2005 Mar 09

1...4 5 678 9 10...28

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