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S7031-0907S PDF预览

S7031-0907S

更新时间: 2024-02-21 06:16:45
品牌 Logo 应用领域
HAMAMATSU 传感器换能器图像传感器
页数 文件大小 规格书
12页 237K
描述
Back-thinned FFT-CCD

S7031-0907S 技术参数

是否Rohs认证:符合生命周期:Active
Reach Compliance Code:unknown风险等级:5.7
Is Samacsys:N其他特性:SENSITIVITY 2.2 MICRO V/ELECTRON
阵列类型:LINEAR主体宽度:22.9 mm
主体高度:7.7 mm主体长度或直径:50 mm
数据速率:1 Mbps动态范围:101.93 dB
水平像素:512外壳:CERAMIC
安装特点:THROUGH HOLE MOUNT最大工作电流:100 mA
最高工作温度:30 °C最低工作温度:-50 °C
输出范围:14-18V输出类型:ANALOG VOLTAGE
封装形状/形式:RECTANGULAR像素大小:24X24 µm
传感器/换能器类型:IMAGE SENSOR,CCD光谱响应 (nm):200-1100
最大供电电压:22 V最小供电电压:18 V
表面贴装:NO端接类型:SOLDER
垂直像素:122Base Number Matches:1

S7031-0907S 数据手册

 浏览型号S7031-0907S的Datasheet PDF文件第6页浏览型号S7031-0907S的Datasheet PDF文件第7页浏览型号S7031-0907S的Datasheet PDF文件第8页浏览型号S7031-0907S的Datasheet PDF文件第9页浏览型号S7031-0907S的Datasheet PDF文件第11页浏览型号S7031-0907S的Datasheet PDF文件第12页 
CCD area image sensors  
S7030/S7031 series  
Pin connections  
S7030 series  
Function  
Reset drain  
Output transistor source  
Output transistor drain  
Output gate  
S7031 series  
Function  
Reset drain  
Output transistor source  
Output transistor drain  
Output gate  
Remark  
(standard operation)  
Pin  
No.  
Symbol  
RD  
OS  
OD  
OG  
SG  
Symbol  
RD  
OS  
OD  
OG  
1
2
3
4
5
+12 V  
RL=22 k:  
+20 V  
+3 V  
Summing gate  
SG  
Summing gate  
Same pulse as P2H  
6
-
-
7
-
-
8
9
P2H  
P1H  
IG2H  
IG1H  
ISH  
TG*19  
P2V  
P1V  
-
-
-
-
SS  
CCD horizontal register clock-2  
CCD horizontal register clock-1  
Test point (horizontal input gate-2)  
Test point (horizontal input gate-1)  
Test point (horizontal input source)  
Transfer gate  
P2H  
P1H  
IG2H  
IG1H  
ISH  
TG*19  
P2V  
P1V  
Th1  
Th2  
P-  
P+  
SS  
ISV  
IG2V  
IG1V  
RG  
CCD horizontal register clock-2  
CCD horizontal register clock-1  
Test point (horizontal input gate-2)  
Test point (horizontal input gate-1)  
Test point (horizontal input source)  
Transfer gate  
CCD vertical register clock-2  
CCD vertical register clock-1  
Thermistor  
Thermistor  
TE-cooler-  
TE-cooler+  
Substrate (GND)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
-8 V  
-8 V  
Connect to RD  
Same pulse as P2V  
CCD vertical register clock-2  
CCD vertical register clock-1  
Substrate (GND)  
GND  
Connect to RD  
-8 V  
ISV  
IG2V  
IG1V  
RG  
Test point (vertical input source)  
Test point (vertical input gate-2)  
Test point (vertical input gate-1)  
Reset gate  
Test point (vertical input source)  
Test point (vertical input gate-2)  
Test point (vertical input gate-1)  
Reset gate  
-8 V  
*19: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V.  
Speci¿cations of built-in TE-cooler (Typ. vacuum condition)  
Parameter  
Internal resistance  
Maximum current*20  
Maximum voltage  
Symbol  
Condition  
S7031-0906S/-0907S  
S7031-1006S/-1007S  
Unit  
:
A
V
W
Rint Ta=25 °C  
Imax Tc*21=Th*22=25 °C  
Vmax Tc*21=Th*22=25 °C  
Qmax  
2.5  
1.5  
3.8  
3.4  
1.2  
3.0  
3.6  
5.1  
23  
Maximum heat absorption  
*
Maximum temperature  
of heat radiating side  
-
70  
70  
°C  
*20: If the current greater than this value Àows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule  
heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable  
operation, the supply current should be less than 60% of this maximum current.  
*21: Temperature of the cooling side of thermoelectric cooler  
*22: Temperature of the heat radiating side of thermoelectric cooler  
*23: This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum  
current is supplied to the unit.  
10  

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