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S29PL127J60BFW003 PDF预览

S29PL127J60BFW003

更新时间: 2023-07-15 00:00:00
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赛普拉斯 - CYPRESS /
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114页 1040K
描述
Flash Memory,

S29PL127J60BFW003 数据手册

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S29PL-J  
128/128/64/32 Megabit (8/8/4/2 M x 16-Bit)  
CMOS 3.0 Volt-only, Simultaneous Read/Write  
Flash Memory with Enhanced VersatileIOTM Control  
PRELIMINARY  
Data Sheet  
Distinctive Characteristics  
Bank 2B:  
Architectural Advantages  
PL129J - 16Mbit (4Kw x 8 and 32Kw x 31)  
„
128/128/64/32 Mbit Page Mode devices  
— Page size of 8 words: Fast page read access from  
random locations within the page  
„
Enhanced VersatileI/OTM (VIO) Control  
— Output voltage generated and input voltages  
tolerated on all control inputs and I/Os is determined  
by the voltage on the VIO pin  
„
Single power supply operation  
— Full Voltage range: 2.7 to 3.6 volt read, erase, and  
program operations for battery-powered applications  
— VIO options at 1.8 V and 3 V I/O for PL127J and  
PL129J devices  
„
„
Dual Chip Enable inputs (only in PL129J)  
Two CE# inputs control selection of each half of the  
memory space  
— 3V VIO for PL064J and PL032J devices  
„
Secured Silicon Sector region  
— Up to 128 words accessible through a command  
sequence  
Simultaneous Read/Write Operation  
— Data can be continuously read from one bank while  
executing erase/program functions in another bank  
— Zero latency switching from write to read operations  
— Up to 64 factory-locked words  
— Up to 64 customer-lockable words  
„
FlexBank Architecture (PL127J/PL064J/PL032J)  
— 4 separate banks, with up to two simultaneous  
operations per device  
„
„
„
„
Both top and bottom boot blocks in one device  
Manufactured on 110 nm process technology  
Data Retention: 20 years typical  
— Bank A:  
PL127J -16 Mbit (4 Kw x 8 and 32 Kw x 31)  
PL064J - 8 Mbit (4 Kw x 8 and 32 Kw x 15)  
PL032J - 4 Mbit (4 Kw x 8 and 32 Kw x 7)  
Cycling Endurance: 1 million cycles per sector  
typical  
— Bank B:  
Performance Characteristics  
PL127J - 48 Mbit (32 Kw x 96)  
PL064J - 24 Mbit (32 Kw x 48)  
PL032J - 12 Mbit (32 Kw x 24)  
„
High Performance  
— Page access times as fast as 20 ns  
— Random access times as fast as 55 ns  
— Bank C:  
„
Power consumption (typical values at 10 MHz)  
— 45 mA active read current  
PL127J - 48 Mbit (32 Kw x 96)  
PL064J - 24 Mbit (32 Kw x 48)  
PL032J - 12 Mbit (32 Kw x 24)  
— 17 mA program/erase current  
— 0.2 µA typical standby mode current  
— Bank D:  
PL127J -16 Mbit (4 Kw x 8 and 32 Kw x 31)  
PL064J - 8 Mbit (4 Kw x 8 and 32 Kw x 15)  
PL032J - 4 Mbit (4 Kw x 8 and 32 Kw x 7)  
Software Features  
„
Software command-set compatible with JEDEC  
42.4 standard  
„
FlexBank Architecture (PL129J)  
— 4 separate banks, with up to two simultaneous  
operations per device  
— Backward compatible with Am29F, Am29LV,  
Am29DL, and AM29PDL families and MBM29QM/RM,  
MBM29LV, MBM29DL, MBM29PDL families  
— CE#1 controlled banks:  
„
„
CFI (Common Flash Interface) compliant  
— Provides device-specific information to the system,  
allowing host software to easily reconfigure for  
different Flash devices  
Bank 1A:  
PL129J - 16Mbit (4Kw x 8 and 32Kw x 31)  
Bank 1B:  
PL129J - 48Mbit (32Kw x 96)  
— CE#2 controlled banks:  
Bank 2A:  
Erase Suspend / Erase Resume  
— Suspends an erase operation to allow read or  
program operations in other sectors of same bank  
PL129J - 48 Mbit (32Kw x 96)  
Publication Number S29PL-J_00 Revision A Amendment 7 Issue Date March 2, 2005  
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that  
product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and  
quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.  

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