D a t a S h e e t
14. Revision History
Section
Description
Revision 01 (February 11, 2011)
Initial release
Revision 02 (March 21, 2011)
Global
Modified document from “Advance Information” to “Preliminary”
Added FBGA package offering for V1 & V2 Model Number
OPN
Removed KGD information, which is documented in a separate Supplement
Removed duplicated commands
Command Definitions Table
Physical Interface
Changed the number of command cycles for a CFI Enter from 3 to 1
Updated 56-pin TSOP pinout figure
Updated 64-ball FBGA pinout figure
Other Resources
Added additional application notes in “Links to Application Notes”
Changed the default value of bit 7 in the Lock register
Lock Register Table
Revision 03 (July 8, 2011)
Performance Summary
Secure Silicon Region ASO
DQ1: Write-to-Buffer Abort
Updated table: Typical Program and Erase Rates
Corrected table: Secure Silicon Region
Corrected table: Data Polling Staus
Embedded Algorithm Performance
Table
Updated table: Embedded Algorithm Characteristics
Corrected tables: changed Software Reset/ASO Exit Data value to from 00F0h to xF0h
Corrected table: Erase Suspend Unlock State Command Transition
Corrected table: Erase Suspend - DYB State Command Transition
Corrected table: Program Unlock State Command Transition
Corrected table: Lock Register State Command Transition
Command State Transitions
Corrected table: Secure Silicon Sector Program State Command Transition
Corrected table: Password Protection Command State Transition
Corrected table: Non-Volatile Protection Command State Transition
Corrected table: PPB Lock Bit Command State Transition
Corrected table: Volatile Sector Protection Command State Transition
Device ID and Common Flash Interface Corrected table: Corrected CFI Primary Vendor-Specific Extended Query description for Word
(ID-CFI) ASO Map
Address (SA) + 0045h
Updated VIL Max
Updated Note
DC Characteristics
Power-On Reset (POR) and Warm
Reset
Updated table: added row to bottom of table
Updated text
Power-On (Cold) Reset (POR)
Hardware (Warm) Reset
Updated figure: Power-Up Diagram
Updated figure: Hardware Reset
Added figure: Back to Back (CE#VIL) Write Operation Timing Diagram
Updated table: Erase/Program Operations
Asynchronous Write Operations
Physical Diagram - LAA064
Added figure
December 14, 2011 S29GL_128S_01GS_00_05
GL-S MirrorBit® Family
97