Datasheet > RT9114C

RT9114C

更新时间： 2024-04-09 19:02:18

品牌	Logo	应用领域
立锜 - RICHTEK		/
页数	文件大小	规格书
93页	5430K
描述
Dual Channel Digital Audio System with EQ and Frequency DRC Control

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RT9114C 数据手册

RT9114C

Parameter

Symbol

V_OH

Test Conditions

Min

Typ

Max Unit

VOH : High-Level

Output Voltage

1.8

SDOUT

VOL : Low-Level

Output Voltage

V_OL

1.024

0.2

Frequency

f_SCLKIN

t_su1

12.288 MHz

Setup Time, LRCK to SCLK

Rising Edge

Hold Time, LRCK from SCLK

Rising Edge

t_h1

Setup Time, SDIN to SCLK

Rising Edge

t_su2

t_h2

Hold Time, SDIN from SCLK

Rising Edge

Rise/Fall Time for

SCLK/LRCK

I²S Duty Cycle for Rising

t_r/t_f

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These

are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2. _JAis measured in the natural convection at T_A= 25C on a high effective four layers thermal conductivity test board of

JEDEC 51-7 thermal measurement standard. The case point of _JCis measured at the top of the package.

Note 3. Devices are ESD sensitive. Handling precaution recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. The switching terminal should be used within AC peak limits. Overshoot and undershoot must be less than 100ns.

Note 6. The capability of the receiver to pull down the SDA line when during the acknowledge clock pulse.

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DS9114C-01 November 2021

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