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RT7251B PDF预览

RT7251B

更新时间: 2024-01-27 08:55:21
品牌 Logo 应用领域
立锜 - RICHTEK /
页数 文件大小 规格书
14页 216K
描述
暂无描述

RT7251B 技术参数

Status:ActiveVin (min) (V):4
Vin (max) (V):17Number of Outputs:1
Vout (min) (V):0.8Vout (max) (V):12
Preset Vout (V):Output Adj. Method:Resistor
Iout (max) (A):1.5Current Limit (typ) (A):3
Freq (typ) (kHz):800Freq (min) (kHz):
Freq (max) (kHz):Ext Sync:No
Ron_HS (typ) (mOhm):145Ron_LS (typ) (mOhm):140
Iq (typ) (mA):0.6Features:Current Mode Control;Enable Input;Internal Compensation;OCP;OVP;PSM;Power Good;Stable with Ceramic Capacitor;UVP
Package Type:WDFN2x2-8

RT7251B 数据手册

 浏览型号RT7251B的Datasheet PDF文件第2页浏览型号RT7251B的Datasheet PDF文件第3页浏览型号RT7251B的Datasheet PDF文件第4页浏览型号RT7251B的Datasheet PDF文件第6页浏览型号RT7251B的Datasheet PDF文件第7页浏览型号RT7251B的Datasheet PDF文件第8页 
RT7251A/B  
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
Minimum On-Time  
tON  
--  
100  
--  
ns  
Input Under Voltage Lockout  
Threshold  
Input Under Voltage Lockout  
Threshold Hysteresis  
VUVLO  
--  
--  
3.5  
--  
--  
V
VUVLO  
200  
mV  
Logic-High VIH  
2.7  
--  
--  
--  
--  
0.4  
--  
EN Threshold  
Voltage  
V
Logic-Low  
VIL  
EN Pull Low Current  
Soft-Start Period  
VEN = 2V, VFB = 1V  
--  
1
A  
ms  
C  
C  
V
tSS  
--  
1
--  
Thermal Shutdown  
TSD  
--  
150  
15  
0.7  
--  
Thermal Shutdown Hysteresis TSD  
--  
--  
Power Good Threshold Rising  
--  
--  
Power Good Threshold  
Hysteresis  
--  
130  
--  
mV  
Power Good Pull Down  
Resistance  
--  
--  
--  
12  
125  
10  
--  
--  
--  
%VREF  
s  
Output OVP Threshold  
Output OVP Propagation  
Delay  
Note 1. Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device.  
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those  
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating  
conditions may affect device reliability.  
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is  
measured at the exposed pad of the package.  
Note 3. Devices are ESD sensitive. Handling precaution is recommended.  
Note 4. The device is not guaranteed to function outside its operating conditions.  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS7251A/B-02 June 2018  
www.richtek.com  
5

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