v2.1
SX Family FPGAs RadTolerant and HiRel
High Density Devices
Features
•
•
•
16,000 and 32,000 Available Logic Gates
Up to 225 User I/Os
Up to 1,080 Dedicated Flip-Flops
RadTolerant SX Family
•
•
Tested Total Ionizing Dose (TID) Survivability Level
Radiation Performance to 100 Krads (Si) (ICC Standby
Parametric)
Easy Logic Integration
•
•
Nonvolatile, User Programmable
Highly Predictable Performance with 100%
Automatic Place-and-Route
•
•
•
Devices Available from Tested Pedigreed Lots
Up to 160 MHz On-Chip Performance
Offered as Class B and E-Flow (Actel Space Level
Flow)
•
•
100% Resource Utilization with 100% Pin Locking
Mixed Voltage Support – 3.3 V Operation with 5.0 V
Input Tolerance for Low-Power Operation
JTAG Boundary Scan Testing in Compliance with IEEE
Standard 1149.1
Secure Programming Technology Prevents Reverse
Engineering and Design Theft
•
QMl Certified Devices
•
•
•
•
•
•
HiRel SX Family
•
•
•
Fastest HiRel FPGA Family Available
Up to 240 MHz On-Chip Performance
Low Cost Prototyping Vehicle for RadTolerant
Devices
Permanently Programmed for Operation on Power-
Up
Unique In-System Diagnostic and Debug Facility with
Silicon Explorer
•
•
Offered as Commercial or Military Temperature
Tested and Class B
Cost Effective QML MIL-Temp Plastic Packaging
Options
Software Design Support with Actel Designer and
®
Libero Integrated Design Environment (IDE) Tools
Predictable, Reliable, and Permanent Antifuse
Technology Performance
•
•
Standard Hermetic Packaging Offerings
QML Certified Devices
Product Profile
RT54SX16
(Obsolete)
RT54SX32
(Obsolete)
Device
A54SX16
A54SX32
Capacity
System Gates
Logic Gates
24,000
16,000
24,000
16,000
48,000
32,000
48,000
32,000
Logic Modules
Register Cells
Combinatorial Cells
User I/Os (Maximum)
JTAG
1,452
528
924
179
Yes
1,452
528
924
180
Yes
2,880
1,080
1,800
227
2,880
1,080
1,800
228
Yes
Yes
Packages (by pin count)
CQFP
208, 256
208, 256
208, 256
208, 256
March 2005
i
© 2005 Actel Corporation
See Actel’s website for the latest version of the datasheet.