Datasheet > RT5021

RT5021

更新时间： 2024-02-09 02:28:50

品牌	Logo	应用领域
立锜 - RICHTEK		/
页数	文件大小	规格书
67页	1288K
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RT5021 技术参数

Status：	Active	Vin (min) (V)：	4.4
Vin (max) (V)：	6	Number of Channels：	9
Number of Buck Converters：	3	Number of Boost Converters：	1
Number of Negative Outputs：	0	Number of LED Drivers：	1
Number of LDO Regulators：	3	Features：	Internal Compensation;OCP;OVP;Power Good;UVP
Package Type：	WQFN5x5-40	Datasheet：	https://datasheet5.oss-cn-shanghai.aliyuncs.com/datasheets/richtek/DS5021-01.pdf

RT5021 数据手册

RT5021

Functional Pin Description

Pin No.

Pin Name

Pin Function

Wake-Up Impulse Push Pull Output. If VIN or BAT plug in, WAKE pin generates one

90ms-width high pulse to notify micro processor.

WAKE

Power Output pin of CH1. To make CH1 stable, the power path from the pin PVD1 to its

output capacitors must be as short (≤1mm is better) and wide as possible to reduce its

parasitic inductance. The output capacitor must be ceramic capacitor (≥20μF).

PVD1

LX1

Switch Node of CH1.

2nd Charger Status Indicator (Open Drain Output).

Feedback Input Pin of CH7 in Step-Up Mode or Current Regulator Mode

CHG2

FB7

Power Output Pin of CH7 in Step-Up or Power Input Pin of CH7 in Current Regulator

Mode.

PVD7

LX7

Switch Node of CH7 in Step-Up Mode.

LX7 initial voltage determine CH7 operation mode.

Charger Status Indicator (Open Drain Output).

Power Output Pin of CH6.

CHG

VO6

PVD6

FB4

SEQ

LX4

Power Input Pin of CH6.

Feedback Input Pin of CH4.

Power Sequence Selection for CH1 to CH4.

Switch Node of CH4.

Enable Pin of Power Converter Unit.

Power Input Pin of CH4 and CH5. To avoid the crosstalk between CH4 and CH5, the

power path from the pin PVD45 to its input capacitors must be as short (≤1mm is better)

and wide as possible to reduce its parasitic inductance. The input capacitance must be

≥10μF with low ESR.

PVD45

LX5

Switch Node of CH5.

Interrupt Indicator Open Drain Output. If events of NoBAT, THR, EOC, Battery

Temperature Change (TS_METER), PGOOD, SAFE, VIN DPM, or Charge Type

Detection Finishing (CHGRUN) happen, the output INT goes low and the INT bit in I²C

INT

Output Voltage Sense Pin or feedback network input pin of CH5. The function is

selected by I²C register.

VO5/FB5

PVD8

SDA

SCL

Power Input Pin of CH8.

Data Signal Pin of I²C Interface.

Clock Signal Pin of I²C Interface.

Power Output Pin of CH8.

Feedback Input Pin of CH2.

Power Output Pin of CH2.

Switch Node B of CH2.

VO8

FB2

VO2

LX2B

LX2A

PVD2

Switch Node A of CH2.

Power Input Pin of CH2.

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DS5021-01 April 2013

1 2 345 6 7...67

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