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RMQS2A3636DGBA-332 PDF预览

RMQS2A3636DGBA-332

更新时间: 2023-12-20 18:44:43
品牌 Logo 应用领域
瑞萨 - RENESAS 静态存储器
页数 文件大小 规格书
30页 878K
描述
36-Mbit QDR? II SRAM 2-word Burst

RMQS2A3636DGBA-332 数据手册

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Datasheet  
RMQS2A3636DGBA, RMQS2A3618DGBA  
R10DS0235EJ0100  
36-Mbit QDR™ II SRAM  
Rev.1.00  
Jan.13, 2015  
2-word Burst  
Description  
The RMQS2A3636DGBA is a 1,048,576-word by 36-bit and the RMQS2A3618DGBA is a 2,097,152-word by 18-bit  
synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor  
memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are  
controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are  
suitable for applications which require synchronous operation, high speed, low voltage, high density and wide bit  
configuration. These products are packaged in 165-pin plastic FBGA package.  
Features  
„ Power Supply  
z
1.8 V for core (VDD), 1.4 V to VDD for I/O (VDDQ  
)
„ Clock  
z
z
z
z
z
Fast clock cycle time for high bandwidth  
Two input clocks (K and /K) for precise DDR timing at clock rising edges only  
Two input clocks for output data (C and /C) to minimize clock skew and flight time mismatches  
Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems  
Clock-stop capability with μs restart  
„
I/O  
z
Separate independent read and write data ports with concurrent transactions  
100% bus utilization DDR read and write operation  
HSTL I/O  
User programmable output impedance  
PLL circuitry for wide output data valid window and future frequency scaling  
z
z
z
z
„ Function  
z
z
z
z
Two-tick burst for low DDR transaction size  
Internally self-timed write control  
Simple control logic for easy depth expansion  
JTAG 1149.1 compatible test access port  
„ Package  
z
165 FBGA package (13 x 15 x 1.4 mm)  
R10DS0235EJ0100 Rev.1.00  
Jan.13, 2015  
Page 1 of 29  

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