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RL78/H1D PDF预览

RL78/H1D

更新时间: 2023-12-20 18:45:08
品牌 Logo 应用领域
瑞萨 - RENESAS 微控制器
页数 文件大小 规格书
146页 1327K
描述
Microcontrollers for Sensing Transducers in Healthcare Devices and Optimized for Blood Pressure Monitors

RL78/H1D 数据手册

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Datasheet  
R01DS0318EJ0110  
Rev. 1.10  
RL78/H1D  
RENESAS MCU  
Apr 28, 2023  
Analog front-end (24-bit ΔΣA/D converter with programmable gain instrumentation amplifier, Amplifier  
unit and 12-bit D/A converter), External signal sampler/Sampling output timer detector and Integrated  
LCD controller/driver.  
True Low Power Platform (as low as 70.8 μA/MHz, and 0.68 μA in Halt mode( RTC2 + LVD)), 1.8 V to  
5.5V operation, 64 to 128 Kbyte Flash, 33 DMIPS at 24 MHz, for Healthcare and Flow meter  
applications.  
1. OUTLINE  
1.1  
Features  
• Background operation (BGO): Instructions  
can be executed from the program memory  
while rewriting the data flash memory.  
• Number of rewrites: 1,000,000 times (TYP.)  
• Voltage of rewrites: VDD = 2.4 to 5.5 VNote 1  
1.8 to 5.5 VNote 2  
Ultra-low power consumption technology  
• VDD = 2.4 to 5.5 V  
(10-bit SAR A/D converter: 2.4 to 5.5 V,  
operating voltage of the analog front-end  
(AFE): 2.7 to 5.5 V) Note 1  
VDD = 1.8 to 5.5 VNote 2  
• HALT mode  
,
,
High-speed on-chip oscillator  
• Select from 24 MHz, 16 MHz, 12 MHz, 8  
MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1  
MHz  
• STOP mode  
• SNOOZE mode  
RL78 CPU core  
• High accuracy: ±1.0% (VDD = 2.4 to 5.5 V, TA  
= -20 to +85°CNote 1, VDD = 1.8 to 5.5 V, TA =  
• CISC architecture with 3-stage pipeline  
• Minimum instruction execution time: Can be  
changed from high speed (0.04167 µs: @ 24  
MHz operation with high-speed on-chip  
oscillator clock) to ultra-low speed (30.5 µs:  
@ 32.768 kHz operation with subsystem  
clock)  
-20 to +85°CNote 2  
)
Operating ambient temperature  
• TA = -40 to +85°C (A: Consumer  
applicationsNote 1, D: Industrial  
applicationsNote 2  
)
• Multiply/divide and multiply/accumulate  
instructions are supported.  
• Address space: 1 MB  
Power management and reset function  
• On-chip power-on-reset (POR) circuit  
• On-chip voltage detector (LVD) (Select  
interrupt and reset from 9Note 1 or 12Note 2  
levels)  
• General-purpose registers: (8-bit register × 8)  
× 4 banks  
• On-chip RAM: 5.5 KBNote 1, 8 KBNote 2  
Code flash memory  
• Code flash memory: 64 to 128 KB  
• Block size: 1 KB  
Data transfer controller (DTC)  
• Transfer modes: Normal transfer mode,  
repeat transfer mode, block transfer mode  
• Activation sources: Activated by interrupt  
sources (35 sources).  
• Prohibition of block erase and rewriting  
(security function)  
• On-chip debug function  
• Self-programming (with boot swap  
function/flash shield window function)  
• Chain transfer function  
Event link controller (ELC)  
Data flash memory  
• Event signals of 18 to 26 types can be linked  
to the specified peripheral function.  
• Data flash memory: 4 KB  
R01DS0318EJ0110 Rev. 1.10  
Apr 28, 2023  
Page 1 of 143  

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