RA8M1 Datasheet
1. Overview
Table 1.7
Feature
Timers
Functional description
General PWM Timer (GPT)
The General PWM Timer (GPT) is a 32-bit timer with GPT32 × 8 channels and a 16-bit timer with
GPT16 × 6 channels. PWM waveforms can be generated by controlling the up-counter, down-
counter, or the up- and down-counter. In addition, PWM waveforms can be generated for
controlling brushless DC motors. The GPT can also be used as a general-purpose timer.
Port Output Enable for GPT (POEG)
The Port Output Enable (POEG) function can place the General PWM Timer (GPT) output pins
in the output disable state
Low Power Asynchronous General
Purpose Timer (AGT)
The Low Power Asynchronous General Purpose Timer (AGT) is a 16-bit timer that can be used
for pulse output, external pulse width or period measurement, and counting external events. This
timer consists of a reload register and a down counter. The reload register and the down counter
are allocated to the same address, and can be accessed with the AGT register.
Ultra-Low-Power Timer (ULPT)
Realtime Clock (RTC)
The Ultra-Low-Power Timer (ULPT) is a 32-bit timer which can be used for outputting pulses or
counting external events. This 32-bit timer consists of reload registers and a down-counter. The
reload registers and the down-counter are allocated to the same address and can be accessed
through the ULPTCNT register.
The realtime clock (RTC) has two counting modes, calendar count mode and binary count mode,
that are used by switching register settings. For calendar count mode, the RTC has a 100-year
calendar from 2000 to 2099 and automatically adjusts dates for leap years. For binary count
mode, the RTC counts seconds and retains the information as a serial value. Binary count mode
can be used for calendars other than the Gregorian (Western) calendar.
Watchdog Timer (WDT)
The Watchdog Timer (WDT) is a 14-bit down counter that can be used to reset the MCU when
the counter underflows because the system has run out of control and is unable to refresh the
WDT. In addition, the WDT can be used to generate a non-maskable interrupt or an underflow
interrupt.
Independent Watchdog Timer (IWDT)
The Independent Watchdog Timer (IWDT) has a 14-bit down-counter, which resets the MCU by
a reset output when the down-counter underflows. Alternatively, generation of an interrupt
request when the counter underflows can be selected. This enables detection of a program
runaway taking the refresh interval into account. The IWDT has two start modes: auto start
mode, in which counting automatically starts after release from the reset state, and register start
mode, in which counting is started by refreshing (writing to a specific register).
Table 1.8
Communication interfaces (1 of 2)
Feature
Functional description
Serial Communications Interface (SCI)
The Serial Communications Interface (SCI) × 6 channels have asynchronous and synchronous
serial interfaces:
●
Asynchronous interfaces (UART and Asynchronous Communications Interface Adapter
(ACIA))
●
●
●
●
●
●
8-bit clock synchronous interface
Simple IIC (master-only)
Simple SPI
Smart card interface
Manchester interface
Simple LIN interface
The smart card interface complies with the ISO/IEC 7816-3 standard for electronic signals and
transmission protocol. All channels have FIFO buffers to enable continuous and full-duplex
communication, and the data transfer speed can be configured independently using an on-chip
baud rate generator.
The maximum rate supported on this MCU. Refer to the electrical characteristics for the actual
rate.
2
2
I C Bus interface (IIC)
The I C Bus interface (IIC) has 2 channels. The IIC module conforms with and provides a subset
2
of the NXP I C (Inter-Integrated Circuit) bus interface functions.
I3C Bus Interface (I3C)
The I3C Bus Interface (I3C) has 1 channel. The I3C module conform with and provide a subset
of the NXP I C (Inter-Integrated Circuit) bus interface functions and a subset of the MIPI I3C.
2
Serial Peripheral Interface (SPI)
The Serial Peripheral Interface (SPI) provides high-speed full-duplex synchronous serial
communications with multiple processors and peripheral devices.
The maximum rate supported on this MCU. Refer to the electrical characteristics for the actual
rate.
Control Area Network with Flexible
Data-Rate Module (CANFD)
The CAN with Flexible Data-Rate (CANFD) module can handle classical CAN frames and
CANFD frames complied with ISO 11898-1 standard.
The module supports 4 transmit buffers per channel and 16 receive buffers per channel.
R01DS0417EJ0110 Rev.1.10
Oct 24, 2023
Page 4 of 188
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