Datasheet > RA8M1

RA8M1

更新时间： 2024-03-03 10:10:48

品牌	Logo	应用领域
瑞萨 - RENESAS		控制器微控制器
页数	文件大小	规格书
188页	2854K
描述
基于 480 MHz Arm? Cortex?-M85、搭载 Helium 和 TrustZone? 的微控制器

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

RA8M1 数据手册

RA8M1 Datasheet

1. Overview

Overview

The MCU integrates multiple series of software-compatible Arm -based 32-bit cores that share a common set of Renesas

peripherals to facilitate design scalability and efficient platform-based product development.

The MCU in this series incorporates a high-performance Arm Cortex -M85 core with Helium running up to 480 MHz

with the following features:

● Up to 2 MB code flash memory

● 1 MB SRAM (128 KB of TCM RAM, 896 KB of user SRAM)

● Octal Serial Peripheral Interface (OSPI)

● Ethernet MAC Controller (ETHERC), USBFS, USBHS, SD/MMC Host Interface

● Analog peripherals

● Security and safety features

1.1

Function Outline

Table 1.1

Arm core

Feature

Functional description

●

Maximum operating frequency: up to 480 MHz

Arm Cortex -M85 core

–

Revision: (r0p2-00rel0)

ARMv8.1-M architecture profile

Armv8-M Security Extension

Floating Point Unit (FPU) compliant with the ANSI/IEEE Std 754-2008

Scalar half, single, and double-precision floating-point operation

M-profile Vector Extension (MVE)

–

Integer, half-precision, and single-precision floating-point MVE (MVE-F)

Helium technology is M-profile Vector Extension (MVE)

●

Arm Memory Protection Unit (Arm MPU)

–

Protected Memory System Architecture (PMSAv8)

Secure MPU (MPU_S): 8 regions

Non-secure MPU (MPU_NS): 8 regions

SysTick timer

–

Embeds two Systick timers: Secure instance (SysTick_S) and Non-secure instance

(SysTick_NS)

–

Driven by CPUCLK or MOCO divided by 8

™

●

CoreSight ETM-M85

Table 1.2

Feature

Memory

Functional description

Code flash memory

Data flash memory

Option-setting memory

SRAM

Maximum 2 MB of code flash memory.

12 KB of data flash memory.

The option-setting memory determines the state of the MCU after a reset.

On-chip high-speed SRAM with either parity bit or Error Correction Code (ECC). SRAM0 is ECC.

SRAM1 is Parity check.

Standby SRAM

ROM

On-chip SRAM that can retain data in Deep Software Standby mode 1.

On-chip immutable ROM contains First Stage Bootloader (FSBL)

Table 1.3

System (1 of 2)

Feature

Functional description

Operating modes

Three operating modes:

●

Single-chip mode

JTAG boot mode

SCI/USB boot mode

Resets

This MCU provides the following 14 types of reset.

R01DS0417EJ0110 Rev.1.10

Oct 24, 2023

Page 2 of 188

123 4 5 6 7...188

下载PDF

与RA8M1相关器件

型号	品牌	描述	获取价格	数据表
RA900-MB-B-8-N	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格
RA900-MB-B-D-B	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格
RA900-MB-W-F-N	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格
RA900-MW-B-8-W	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格
RA900-MW-B-9-W	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格
RA900-MW-B-D-B	Carling Technologies	Rocker Switch, SPST, Latched, Solder Terminal, Rocker Actuator, Panel Mount	获取价格