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R854H8Y2-4

更新时间： 2024-01-13 20:42:34
品牌 Logo 应用领域
FREQUENCYDEVICES 开关
页数 文件大小 规格书
13页 436K
描述
2" x 4" Range Switch 4-Pole Filters

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R854H8Y2-4 技术参数

是否Rohs认证： 不符合生命周期：Active
包装说明：, MODULE,17LEAD,4Reach Compliance Code：unknown
风险等级：5.78JESD-30 代码：R-XXMA-T17
长度：101.6 mm负电源电压最大值（Vsup）：-18 V
负电源电压最小值（Vsup）：-12 V标称负供电电压 (Vsup)：-15 V
功能数量：1端子数量：17
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装等效代码：MODULE,17LEAD,4
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
认证状态：Not Qualified座面最大高度：15.74 mm
最大供电电流 (Isup)：20 mA最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：12 V标称供电电压 (Vsup)：15 V
表面贴装：NO温度等级：COMMERCIAL
端子形式：THROUGH-HOLE端子位置：UNSPECIFIED
宽度：50.8 mmBase Number Matches：1

R854H8Y2-4 数据手册

 浏览型号R854H8Y2-4的Datasheet PDF文件第1页浏览型号R854H8Y2-4的Datasheet PDF文件第3页浏览型号R854H8Y2-4的Datasheet PDF文件第4页浏览型号R854H8Y2-4的Datasheet PDF文件第5页浏览型号R854H8Y2-4的Datasheet PDF文件第6页浏览型号R854H8Y2-4的Datasheet PDF文件第7页 
R854 Series  
Range Switch  
Digital Tuning &  
8-Bit Programmable Filters  
Control Characteristics  
Pin-Out Key  
Digital Tuning Characteristics  
IN  
Analog Input Signal  
D7 Tuning Bit 7 (MSB)  
D6 Tuning Bit 6  
D5 Tuning Bit 5  
D4 Tuning Bit 4  
D3 Tuning Bit 3  
D2 Tuning Bit 2  
D1 Tuning Bit 1  
D0 Tuning Bit 0 (LSB)  
The digital tuning interface circuits are two 4042 quad CMOS  
latches which accept the following CMOS-compatible inputs:  
eight tuning bits (D0 - D7), a range selection bit (R), a latch  
strobe bit (C), and a transition polarity bit (P).  
OUT Analog Output Signal  
GND Power and Signal Return  
"P"  
"C"  
+Vs Supply Voltage, Positive  
-Vs Supply Voltage, Negative  
Os  
R
OUT +Vs  
Transition Polarity Bit  
Tuning Strobe Bit  
Filter tuning follows the tuning equation given below:  
7
6
5
4
3
4
3
fc = ( fmax/256 ) [ 1 + D7 x 2 + D6 x 2 + D5 x 2 + D x 2 + D x 2  
Optional Offset Adjustment  
Range Switch Adjustment  
-Vs  
+ D2 x 22 + D1 x 21 + D0 x 20 ]  
R
where D1 - D7 = "0" or "1", and  
fmax = Maximum tuning frequency;  
fc = corner frequency;  
D7  
D6  
D5  
D4  
R = 0, Maximum low range  
R = 1, Maximum  
Minimum tunable frequency = fmax/256 (D0 thru D7 = 0);  
Minimum frequency step (Resolution) = fmax/256  
GND  
D3  
D2  
D1  
D0  
Data Control Specifications  
Data Control Lines  
Functions  
Latch Strobe (C)  
IN Os4  
P
C
Transition Polarity (P)  
Bottom View  
Data Control Modes  
Mode 1  
Bit  
MSB ---  
---  
---  
---  
---  
---  
LSB  
P = 0; C = 0 frequency follows input codes  
Weight  
P = 0; C = 0› frequency latched on rising edge  
27  
26  
25  
24  
23  
22  
21  
20  
fc  
Mode 2  
P = 1; C = 1 frequency follows input codes  
Corner  
Frequency  
P = 1; C = 1fl frequency latched on falling edge  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Input Data Levels  
Input Voltage (Vs = 15 Vdc)  
Low Level In  
High Level In  
Input Current  
High Level In  
Low Level In  
(CMOS Logic)  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
fmax/256  
fmax/128  
fmax/64  
fmax/32  
fmax/16  
fmax/8  
0 Vdc min.  
11 Vdc min.  
4 Vdc max.  
15 Vdc max.  
- 10 -5 mA typ. -1 mA max.  
+10 -5 mA typ. +1 mA max.  
Input Capacitance  
Latch Response  
5 pF typ  
7.5 pF max.  
Data Set Up Time1 25 nS  
Data Hold Time2  
50 nS  
fmax/4  
Strobe Pulse Width 80 nS min.  
Input Data Format  
Positive Logic  
Frequency Select Bits  
fmax/2  
Logic "1" = +Vs  
Logic "0" = Gnd  
(Binary-Coded)  
1
fmax  
Bit Weighting  
Notes:  
D0  
D7  
LSB (least significant bit)  
MSB (most significant bit)  
256 : 1, Binary Weighted  
1.Frequency data must be present before occurrence of strobe edge.  
2.Frequency data must be present after occurrence of strobe edge.  
Frequency Range  
2
1784 Chessie Lane, Ottawa, IL 61350 • Tel: 800/252-7074, 815/434-7800 • FAX: 815/434-8176  
e-mail: sales@freqdev.com • Web Address: http://www.freqdev.com  
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