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R7FA6M4AF3CFM PDF预览

R7FA6M4AF3CFM

更新时间: 2024-01-27 08:32:33
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
109页 1314K
描述
Armv8-M architecture with the main extension

R7FA6M4AF3CFM 数据手册

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Datasheet  
R01DS0365EJ0110  
Rev.1.10  
RA6M4 Group  
Renesas Microcontrollers  
Sep 29, 2020  
High-performance 200 MHz Arm Cortex-M33 core, up to 1 MB code flash memory with Dual-bank, background and SWAP  
operation, 8 KB Data flash memory, and 256 KB SRAM with Parity/ECC. High-integration with Ethernet MAC controller, USB  
2.0 Full-Speed, SDHI, Quad and Octa SPI, and advanced analog. Integrated Secure Crypto Engine with cryptography  
accelerators, key management support, tamper detection and power analysis resistance in concert with Arm TrustZone for  
integrated secure element functionality.  
Features  
®
®
DMA Controller (DMAC) × 8  
Power-on reset  
Arm Cortex -M33 Core  
Armv8-M architecture with the main extension  
Maximum operating frequency: 200 MHz  
Arm Memory Protection Unit (Arm MPU)  
Protected Memory System Architecture (PMSAv8)  
Secure MPU (MPU_S): 8 regions  
Non-secure MPU (MPU_NS): 8 regions  
SysTick timer  
Embeds two Systick timers: Secure and Non-secure instance  
Driven by LOCO or system clock  
CoreSight ETM-M33  
Low Voltage Detection (LVD) with voltage settings  
Watchdog Timer (WDT)  
Independent Watchdog Timer (IWDT)  
■ Human Machine Interface (HMI)  
Capacitive Touch Sensing Unit (CTSU)  
■ Multiple Clock Sources  
Main clock oscillator (MOSC) (8 to 24 MHz)  
Sub-clock oscillator (SOSC) (32.768 kHz)  
High-speed on-chip oscillator (HOCO) (16/18/20 MHz)  
Middle-speed on-chip oscillator (MOCO) (8 MHz)  
Low-speed on-chip oscillator (LOCO) (32.768 kHz)  
IWDT-dedicated on-chip oscillator (15 kHz)  
Clock trim function for HOCO/MOCO/LOCO  
PLL/PLL2  
■ Memory  
Up to 1-MB code flash memory  
8-KB data flash memory (100,000 program/erase (P/E) cycles)  
256-KB SRAM  
■ Connectivity  
Clock out support  
Serial Communications Interface (SCI) × 10  
Asynchronous interfaces  
8-bit clock synchronous interface  
Smart card interface  
■ General-Purpose I/O Ports  
5-V tolerance, open drain, input pull-up, switchable driving ability  
Simple IIC  
■ Operating Voltage  
VCC: 2.7 to 3.6 V  
Simple SPI  
Manchester coding (SCI3, SCI4)  
2
I C bus interface (IIC) × 2  
■ Operating Temperature and Packages  
Ta = -40℃ to +105℃  
Serial Peripheral Interface (SPI) × 2  
Quad Serial Peripheral Interface (QSPI)  
Octa Serial Peripheral Interface (OSPI)  
USB 2.0 Full-Speed Module (USBFS)  
Control Area Network module (CAN) × 2  
Ethernet MAC/DMA Controller (ETHERC/EDMAC)  
SD/MMC Host Interface (SDHI)  
144-pin LQFP (20 mm × 20 mm, 0.5 mm pitch)  
100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)  
64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)  
Serial Sound Interface Enhanced (SSIE)  
■ Analog  
12-bit A/D Converter (ADC12) × 2  
12-bit D/A Converter (DAC12) × 2  
Temperature Sensor (TSN)  
■ Timers  
General PWM Timer 32-bit (GPT32) × 4  
General PWM Timer 16-bit (GPT16) × 6  
Low Power Asynchronous General Purpose Timer (AGT) × 6  
■ Security and Encryption  
Secure Crypto Engine 9  
Symmetric algorithms: AES  
Asymmetric algorithms: RSA, ECC, and DSA  
Hash-value generation: SHA224, SHA256, GHASH  
128-bit unique ID  
®
®
Arm TrustZone  
Up to three or six regions for the code flash, depending on the  
bank mode  
Up to two regions for the data flash  
Up to three regions for the SRAM  
Individual secure or non-secure security attribution for each  
peripheral  
Device lifecyle management  
Pin function  
Up to three tamper pins  
Secure pin multiplexing  
■ System and Power Management  
Low power modes  
Battery backup function (VBATT)  
Realtime Clock (RTC) with calendar and VBATT support  
Event Link Controller (ELC)  
Data Transfer Controller (DTC)  
R01DS0365EJ0110 Rev.1.10  
Sep 29, 2020  
Page 1 of 109  

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