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R4F20103DFA

更新时间： 2024-01-08 01:53:23
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟外围集成电路
页数 文件大小 规格书
1012页 5376K
描述
MICROCONTROLLER

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中文翻译

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R4F20103DFA 技术参数

生命周期：Not RecommendedReach Compliance Code：compliant
风险等级：5.73具有ADC：YES
地址总线宽度：位大小：16
最大时钟频率：20 MHzDMA 通道：YES
外部数据总线宽度：I/O 线路数量：55
端子数量：64PWM 通道：YES
封装代码：LFQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH速度：20 MHz
最大供电电压：5.5 V最小供电电压：2.7 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS端子形式：GULL WING
端子位置：QUADuPs/uCs/外围集成电路类型：MICROCONTROLLER
Base Number Matches：1

R4F20103DFA 数据手册

 浏览型号R4F20103DFA的Datasheet PDF文件第3页浏览型号R4F20103DFA的Datasheet PDF文件第4页浏览型号R4F20103DFA的Datasheet PDF文件第5页浏览型号R4F20103DFA的Datasheet PDF文件第7页浏览型号R4F20103DFA的Datasheet PDF文件第8页浏览型号R4F20103DFA的Datasheet PDF文件第9页 
2. Description of Numbers and Symbols  
Aspects of the notations for register names, bit names, numbers, and symbolic names in this  
manual are explained below.  
(1) Overall notation  
In descriptions involving the names of bits and bit fields within this manual, the modules and  
registers to which the bits belong may be clarified by giving the names in the forms  
"module name"."register name"."bit name" or "register name"."bit name".  
(2) Register notation  
The style "register name"_"instance number" is used in cases where there is more than one  
instance of the same function or similar functions.  
[Example] CMCSR_0: Indicates the CMCSR register for the compare-match timer of channel 0.  
(3) Number notation  
Binary numbers are given as B'nnnn (B' may be omitted if the number is obviously binary),  
hexadecimal numbers are given as H'nnnn or 0xnnnn, and decimal numbers are given as nnnn.  
[Examples] Binary:  
B'11 or 11  
Hexadecimal: H'EFA0 or 0xEFA0  
Decimal:  
1234  
(4) Notation for active-low  
An overbar on the name indicates that a signal or pin is active-low.  
[Example] WDTOVF  
(4)  
(2)  
14.2.2 Compare Match Control/Status Register_0, _1 (CMCSR_0, CMCSR_1)  
CMCSR indicates compare match generation, enables or disables interrupts, and selects the counter  
input clock. Generation of a WDTOVF signal or interrupt initializes the TCNT value to 0.  
14.3 Operation  
14.3.1 Interval Count Operation  
When an internal clock is selected with the CKS1 and CKS0 bits in CMCSR and the STR bit in  
CMSTR is set to 1, CMCNT starts incrementing using the selected clock. When the values in  
CMCNT and the compare match constant register (CMCOR) match, CMCNT is cleared to H'0000  
and the CMF flag in CMCSR is set to 1. When the CKS1 and CKS0 bits are set to B'01 at this time,  
a f/4 clock is selected.  
Rev. 0.50, 10/04, page 416 of 914  
(3)  
Note: The bit names and sentences in the above figure are examples and have nothing to do  
with the contents of this manual.  
Page vi of xxvi  
1...3456789...1012

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