Datasheet > PSN1100A_10

PSN1100A_10

更新时间： 2022-11-22 14:50:01

品牌	Logo	应用领域
ZCOMM		/
页数	文件大小	规格书
2页	70K
描述
PHASE LOCKED LOOP

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数据手册

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PSN1100A_10 数据手册

PSN1100A

PHASE LOCKED LOOP

14118 Stowe Drive, Suite B | Poway, CA 92064

TEL: (858) 621-2700 | FAX: (858) 486-1927

Rev A1

PHASE NOISE (1 Hz BW, typical)

-60

-80

-100

-120

FEATURES

• Frequency Range: 1076 -

1130 MHz

KHz

• Step Size:

-140

-160

•

- Style Package

PLL

APPLICATIONS

• Basestations

• Mobile Radios

1 kHz

100 Hz

10 kHz

100 kHz

Satellite Communications

•

VALUE

1076 - 1130

UNITS

MHz

PERFORMANCE SPECIFICATIONS

Frequency Range

-105

dBc/Hz

dBc

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

-15

-70

3±2

dBc

Power Output

dBm

Load Impedance

Step Size

kHz

1000

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

mSec

°C

-40 to +85

Operating Temperature Range

Package Style

PLL

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Vdc

Supply Current (Icc, typ.)

All specifications are typical unless otherwise noted and subject to change without notice.

APPLICATION NOTES

• AN-107 : How to Solder Z-COMM VCOs / PLLs

• AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

<40 MHz

Frequency Synthesizer: National Semiconductor - LMX2316

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