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PSD411A1-C-15L

更新时间： 2024-02-04 18:30:22
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 并行IO端口微控制器和处理器外围集成电路
页数 文件大小 规格书
123页 649K
描述
Low Cost Field Programmable Microcontroller Peripherals

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PSD411A1-C-15L 技术参数

生命周期：Transferred包装说明：PLASTIC, TQFP-80
Reach Compliance Code：unknown风险等级：5.65
Is Samacsys：NJESD-30 代码：S-PQFP-G80
I/O 线路数量：40端口数量：5
端子数量：80最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装形状：SQUARE封装形式：FLATPACK
认证状态：Not Qualified最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子位置：QUADuPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：1

PSD411A1-C-15L 数据手册

 浏览型号PSD411A1-C-15L的Datasheet PDF文件第6页浏览型号PSD411A1-C-15L的Datasheet PDF文件第7页浏览型号PSD411A1-C-15L的Datasheet PDF文件第8页浏览型号PSD411A1-C-15L的Datasheet PDF文件第10页浏览型号PSD411A1-C-15L的Datasheet PDF文件第11页浏览型号PSD411A1-C-15L的Datasheet PDF文件第12页 
PSD4XX Family  
Shown in Figure 3 (below) is the software design flow for a PSD4XX device.  
PSDsoft—ST’s software development suite—is used throughout the design phase. You  
start with a design file that is written in PSDabel—a high-level hardware description  
language (HDL). Before you compile your design, you must also configure the PSD4XX so  
it knows what signals to expect from your microprocessor and what pre-runtime options  
should be set (such as the security bit).  
6.0  
Design Flow  
Once you have a design file and have configured the device, you are ready to run the Fitter  
and Address Translator. The Fitter accepts input from PSDabel and PSD Configuration,  
synthesizes this user logic and configuration, and fits the design to the PSD silicon. The  
Address Translator process allows the user to map the MCU firmware from a cross-  
compiler (in Intel HEX or S-Record format) into the NVM memory blocks within the PSD. As  
a result, the MCU firmware is merged with the logic and configuration definition of the PSD.  
The output of the Address Translator and the Fitter is the required object file that is used by  
a programmer to program the PSD device. The object file includes chip configuration, the  
PLD fusemap, and MCU firmware information.  
PSDsilosIII is an optional program that provides functional chip-level simulation of the  
PSD4XX. PSDsoft automatically creates files for input to the simulator. These files convey  
relevant design information to the simulator. As a result, the user only has to create a  
stimulus file since all of the signals and node names are taken from the design file.  
Figure 3. PSDsoft Development Tools  
PSDsoft  
Development Software  
PSD Configuration  
PSDabel™  
ZPLD DESCRIPTION  
(STATE MACHINE, DECODING)  
CHIP CONFIGURATION  
CODE FILE  
PSD Compiler  
THIRD PARTY  
(ZPLD FITTING, ADDRESS TRANSLATION)  
PROGRAMMERS  
PSD Programmer  
PSDsilos III™  
®
SILOSIII  
PSDpro/MagicPro  
CHIP SIMULATION  
CHIP PROGRAMMING  
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