Datasheet > PPXS2010VVU120R

PPXS2010VVU120R

更新时间： 2022-03-21 22:33:29

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
130页	778K
描述
PXD20 Microcontroller

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数据手册

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PPXS2010VVU120R 数据手册

Overview

1.2

Block diagram

PXD20 Block Diagram

System

VREG

Debug

JTAG

Crossbar Masters

Z160

GFX

e200z4d Core

(4 KB I-Cache)

DCU

Lite

Oscillator

Nexus

Class 3+

VIU2

DCU

TCON RSDS

FMPLL x 2

RTC/32 kHz

Oscillator

MMU

Interrupt

Controller

16-ch DMA

Crossbar Switch (XBAR)

Memory Protection Unit (MPU)

PIT

SWT

STM

2 MB

Flash

1 MB

Graphics PBRIDGE

SRAM

64 KB

SRAM

RLE

Decode

Quad

SPI V02

DRAM

Interface

Boot

Assist

Module

(BAM)

ECC

Crossbar Slaves

Communications I/O System

SSD

20-ch

ADC

10-bit

eMIOS A eMIOS B

16-ch 16-ch

CAN

UART/LIN

SPI

I²C

SGM

SMD

ADC

– Analog-to-digital converter

RTC

– Real time clock

CAN

DCU

– Controller area network controller

– Display control unit

RSDS

SGM

– Reduced-swing differential sgnal interface

– Sound generator module

DMA

DRAM

ECC

– Direct memory access controller

– Dynamic random-access memory

– Error correction code

SMD SSD – Stepper motor driver/stepper stall detect

SPI

SRAM

STM

– Serial peripheral interface controller

– Sraric random-access memory

– System timer module

eMIOS

FMPLL

GFX

– Timed input/output

– Frequency-modulated phase-locked loop

– OpenVG graphics accelerator

– Inter-integrated circuit controller

– Joint Test Action Group interface

– Memory management unit

SWT

TCON

– Software watchdog timer

– Timing controller

I²C

UART/LIN – Universal asynchronous receiver/transmitter/

JTAG

MMU

local interconnect network

VIU2

VLE

VREG

– Video input unit

– Variable-length execution set

– Voltage regulator

PBRIDGE – Peripheral I/O bridge

PIT

RLE

– Periodic interrupt timer

– Run length encoding

Figure 1. PXD20 block diagram

PXD20 Microcontroller Data Sheet, Rev. 2

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

1 2 345 6 7...130

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