Datasheet > PPXN2005VMM80R

PPXN2005VMM80R

更新时间： 2022-04-14 02:30:32

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
119页	667K
描述
PXS20 Microcontroller

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中文翻译

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数据手册

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PPXN2005VMM80R 数据手册

Introduction

Table 1. PXS20 Family Feature Set (continued)

Feature

PXS20

Crossbar

Memory

Master × slave ports

Lock Step Mode: 4 × 3

Decoupled Parallel Mode: 6 × 3

Code/data flash

1 MB, ECC, RWW

128 KB, ECC

Static RAM (SRAM)

Interrupt controller (INTC)

Periodic Interrupt Timer (PIT)

System timer module (STM)

Software watchdog timer (SWT)

eDMA

Modules

16 interrupt levels, replicated module

1 × 4 channels

1 × 4 channels, replicated module

Yes, replicated module

16 channels, replicated module

1 × 64 message buffers, dual channel

2 × 32 message buffers

FlexRay

CAN

UART with DMA support

Clock out

Yes

Fault control & collection unit (FCCU)

Cross triggering unit (CTU)

eTimer

Yes

3 × 6 channels

PWM

2 Module 4 × (2 + 1) channels

Analog-to-digital converter (ADC)

2 × 12-bit ADC, 16 channels per ADC

(3 internal, 4 shared and 9 external)

Modules

(cont.)

Sine-wave generator (SWG)

32 point

Serial peripheral interface (SPI)

3 × SPI

as many as 8 chip selects

Cyclic redundancy checker (CRC) unit

Junction temperature sensor (TSENS)

Digital I/Os

Yes

Yes, replicated module

 16

Supply

Device power supply

3.3 V with integrated bypassable ballast transistor

External ballast transistor not needed for bare die

Analog reference voltage

3.0 V – 3.6 V and 4.5 V – 5.5 V

Clocking

Frequency-modulated phase-locked loop (FMPLL)

Internal RC oscillator

External crystal oscillator

Nexus

16 MHz

4 – 40 MHz

Level 3+

Debug

Packages

Type

144 LQFP

257 MAPBGA

PXS20 Microcontroller Data Sheet, Rev. 1

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

1 2 345 6 7...119

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