Datasheet > PPXD3010VMS2R

PPXD3010VMS2R

更新时间： 2022-03-22 02:07:24

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
139页	792K
描述
PXS30 Microcontroller

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PPXD3010VMS2R 数据手册

Introduction

to assist with users’ implementations. See Section 3, Developer support, for more information.

Introduction

1.1

Document overview

This document describes the features of the family and options available within the family members, and

highlights important electrical and physical characteristics of the devices.

This document provides electrical specifications, pin assignments, and package diagrams for the PXS30

series of microcontroller units (MCUs). For functional characteristics, see the PXS30 Microcontroller

Reference Manual.

1.2

Device comparison

Table 1. PXS30 Family Feature Set

Features

PXS3010 PXS3015

PXS3020

CPU

Type

2 × e200z7d (SoR¹) in lock-step or decoupled operation

Harvard

Architecture

Execution speed

0–150 MHz (+2% FM) 0–180 MHz (+2% FM) 0–180 MHz (+2% FM)

Nominal platform

frequency (in 1:1, 1:2,

and 1:3 modes)

0–75 MHz (+2% FM)

0–90 MHz (+2% FM)

MMU

64 entries (SoR)

Yes

Instruction set PPC

Instruction set VLE

Instruction cache

Data cache

Yes

16 KB, 4-way with EDC (SoR)

Yes (SoR)

MPU

Buses

Core bus

32-bit address, 64-bit data

32-bit address, 32-bit data

Yes (SoR)

Internal periphery bus

Master  slave ports

Static RAM (SRAM)

Code Flash memory

Data Flash memory

XBAR

Memory

256 KB (ECC)

1 MB²

384 KB (ECC)

512 KB (ECC)

2 MB²

1.5 MB²

64 KB²

PXS30 Microcontroller Data Sheet, Rev. 1

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

123 4 5 6 7...139

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