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POMAPL132BZWTA2E PDF预览

POMAPL132BZWTA2E

更新时间： 2024-01-16 12:26:24
品牌 Logo 应用领域
德州仪器 - TI 外围集成电路
页数 文件大小 规格书
227页 1415K
描述
SPECIALTY MICROPROCESSOR CIRCUIT, PBGA361, GREEN, PLASTIC, NFBGA-361

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POMAPL132BZWTA2E 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：LFBGA,针数：361
Reach Compliance Code：unknownHTS代码：8542.31.00.01
风险等级：5.84其他特性：IT ALSO OPERATES IN 0.95V MINIMUM SUPPLY
JESD-30 代码：S-PBGA-B361长度：16 mm
端子数量：361封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH认证状态：Not Qualified
座面最大高度：1.4 mm最大供电电压：1.32 V
最小供电电压：1.14 V标称供电电压：1.2 V
表面贴装：YES技术：CMOS
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM宽度：16 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUITBase Number Matches：1

POMAPL132BZWTA2E 数据手册

 浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第2页浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第3页浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第4页浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第5页浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第6页浏览型号POMAPL132BZWTA2E的Datasheet PDF文件第7页 
OMAP-L132  
www.ti.com  
SPRS762–AUGUST 2011  
OMAP-L132 C6-Integra™ DSP+ARM® Processor  
Check for Samples: OMAP-L132  
1 OMAP-L132 C6-Integra™ DSP+ARM® Processor  
1.1 Features  
12  
– 32K-Byte L1D Data RAM/Cache  
• Highlights  
– 256K-Byte L2 Unified Mapped RAM/Cache  
– Flexible RAM/Cache Partition (L1 and L2)  
• Enhanced Direct-Memory-Access Controller 3  
– Dual Core SoC  
•
•
200-MHz ARM926EJ-S™ RISC MPU  
200-MHz C674x Fixed/Floating-Point VLIW  
DSP  
(EDMA3):  
– 2 Channel Controllers  
– Supports TI’s Basic Secure Boot  
– 3 Transfer Controllers  
– Enhanced Direct-Memory-Access Controller  
(EDMA3)  
– 64 Independent DMA Channels  
– 16 Quick DMA Channels  
– DDR2/Mobile DDR Memory Controller  
– Two Multimedia Card (MMC)/Secure Digital  
– Programmable Transfer Burst Size  
• TMS320C674x Floating-Point VLIW DSP Core  
(SD) Card Interface  
– 10/100 Mb/s Ethernet MAC (EMAC)  
– Programmable Real-Time Unit Subsystem  
– Three Configurable UART Modules  
– One Multichannel Audio Serial Port  
– Two Multichannel Buffered Serial Ports  
• Dual Core SoC  
– Load-Store Architecture With Non-Aligned  
Support  
– 64 General-Purpose Registers (32 Bit)  
– Six ALU (32-/40-Bit) Functional Units  
•
Supports 32-Bit Integer, SP (IEEE Single  
Precision/32-Bit) and DP (IEEE Double  
Precision/64-Bit) Floating Point  
– 200-MHz ARM926EJ-S™ RISC MPU  
– 200-MHz C674x Fixed/Floating-Point VLIW  
•
•
Supports up to Four SP Additions Per  
Clock, Four DP Additions Every 2 Clocks  
Supports up to Two Floating Point (SP or  
DP) Reciprocal Approximation (RCPxP)  
and Square-Root Reciprocal  
DSP  
• ARM926EJ-S Core  
– 32-Bit and 16-Bit (Thumb®) Instructions  
– DSP Instruction Extensions  
– Single Cycle MAC  
Approximation (RSQRxP) Operations Per  
Cycle  
– ARM® Jazelle® Technology  
– EmbeddedICE-RT™ for Real-Time Debug  
• ARM9 Memory Architecture  
– Two Multiply Functional Units  
•
Mixed-Precision IEEE Floating Point  
Multiply Supported up to:  
– 16K-Byte Instruction Cache  
– 16K-Byte Data Cache  
– 8K-Byte RAM (Vector Table)  
– 64K-Byte ROM  
–
–
–
–
2 SP x SP → SP Per Clock  
2 SP x SP → DP Every Two Clocks  
2 SP x DP → DP Every Three Clocks  
2 DP x DP → DP Every Four Clocks  
• C674x™ Instruction Set Features  
– Superset of the C67x+™ and C64x+™ ISAs  
– Up to 1600/1200 C674x MIPS/MFLOPS  
– Byte-Addressable (8-/16-/32-/64-Bit Data)  
– 8-Bit Overflow Protection  
•
Fixed Point Multiply Supports Two 32 x  
32-Bit Multiplies, Four 16 x 16-Bit  
Multiplies, or Eight 8 x 8-Bit Multiplies per  
Clock Cycle, and Complex Multiples  
– Instruction Packing Reduces Code Size  
– All Instructions Conditional  
– Hardware Support for Modulo Loop  
Operation  
– Protected Mode Operation  
– Bit-Field Extract, Set, Clear  
– Normalization, Saturation, Bit-Counting  
– Compact 16-Bit Instructions  
• C674x Two Level Cache Memory Architecture  
– 32K-Byte L1P Program RAM/Cache  
– Exceptions Support for Error Detection and  
Program Redirection  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011, Texas Instruments Incorporated  
 
 
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