PM6675S

更新时间： 2024-02-23 02:16:07

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		稳压器控制器
页数	文件大小	规格书
53页	2635K
描述
High efficiency step-down controller with embedded 2 A LDO regulator

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技术参数
数据手册

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PM6675S 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN, LCC24,.16SQ,20	针数：	24
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.83
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER	控制模式：	VOLTAGE-MODE
最大输入电压：	36 V	最小输入电压：	4.5 V
标称输入电压：	5 V	JESD-30 代码：	S-XQCC-N24
长度：	4 mm	功能数量：	1
端子数量：	24	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC24,.16SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Switching Regulator or Controllers	表面贴装：	YES
切换器配置：	PUSH-PULL	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	4 mm
Base Number Matches：	1

PM6675S 数据手册

PM6675S

Application information

8.1.7

All ceramic capacitors application

Design of external feedback network depends on the output voltage ripple across the output

capacitors ESR. If the ripple is great enough (at least 20 mV), the compensation network

simply consists of a C_INTcapacitor.

Figure 49. Integrative compensation

Ton One-shot

generator

VSNS

VOUT

PWM

Comparator

V_REF

Vr=0.9

COMP

0.6V

VREF

Integrator

FILT

CINT

INT

The stability of the system firstly depends on the output capacitor zero frequency. It must be

verified that:

Equation 49

f_SW> k ⋅ f_Zout

2π⋅R_outC_out

where k is a free design parameter greater than unity (k > 3) . It determines the minimum

integrator capacitor value C_INT

Equation 50

g_m

Vref

C_INT

⋅

⎛

⎜

⎞

⎟

2π ⋅

− f_Zout

⎝

⎠

If the ripple on the COMP pin is greater than the integrator output dynamic (150 mV), an

additional capacitor C_filtcould be added in order to reduce its amplitude. If q is the desired

attenuation factor of the output ripple, select:

47/53

1...44 45 464748 49 50...53

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