Datasheet > PL66X-XXOCL

PL66X-XXOCL

更新时间： 2022-12-21 17:37:28

品牌	Logo	应用领域
PLL		倍频器
页数	文件大小	规格书
15页	484K
描述
Analog Frequency Multiplier

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

PL66X-XXOCL 数据手册

Analog Frequency Multiplier

PL660 and PL663 XO Families

L 2 X

O E

X IN

Q B A R

F re q u e n c y

X 2

O s c illa to r

A m p lifie r

F re q u e n c y

X 4

X O U T

O n ly re q u ire d in x 4 d e s ig n s

L 4 X

Figure 2: Block Diagram of AFM XO

Figure 3 shows the period jitter histogram of the 2x Analog Frequency Multiplier at 212.5 MHz, while

Figure 4 shows the very low levels of sub-harmonics that correspond to the exceptional performance (i.e.

low jitter).

Figure 3: Period Jitter Histogram at 212.5MHz

Analog Frequency Multiplier (2x),

with 106.25 MHz crystal

Figure 4: Spectrum Analysis at 212.5MHz

Analog Frequency Multiplier (2x),

with sub-harmonics below –69 dBc

OE LOGIC SELECTION

OUTPUT

OESEL

Output State

0 (Default)

Enabled

Tri-state

Enabled

Tri-state

Enabled

Tri-state

0 (Default)

PECL

0 (Default)

1 (Default)

0 (Default)

LVDS or CMOS

OESEL and OE: Connect to VDD to set to “1”, connect to GND to set to “0”. [The ‘Default’ state is set by internal pull up/down resistor.]

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991

www.phaselink.com

Rev. 3/20/07 Page 2

123 4 5 6 7...15

下载PDF

与PL66X-XXOCL相关器件

型号	品牌	描述	获取价格	数据表
PL66X-XXOCL-R	PLL	Analog Frequency Multiplier	获取价格
PL66X-XXOC-R	PLL	Analog Frequency Multiplier	获取价格
PL66X-XXQC	PLL	Analog Frequency Multiplier	获取价格
PL66X-XXQCL	PLL	Analog Frequency Multiplier	获取价格
PL66X-XXQCL-R	PLL	Analog Frequency Multiplier	获取价格
PL66X-XXQC-R	PLL	Analog Frequency Multiplier	获取价格