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PI74FCT162823ATV PDF预览

PI74FCT162823ATV

更新时间: 2024-01-09 03:58:39
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 79K
描述
Bus Driver, FCT Series, 2-Func, 9-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

PI74FCT162823ATV 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.3其他特性:WITH CLEAR AND CLOCK ENABLE
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:9
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):20 ns
认证状态:Not Qualified座面最大高度:2.74 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

PI74FCT162823ATV 数据手册

 浏览型号PI74FCT162823ATV的Datasheet PDF文件第2页浏览型号PI74FCT162823ATV的Datasheet PDF文件第3页浏览型号PI74FCT162823ATV的Datasheet PDF文件第4页浏览型号PI74FCT162823ATV的Datasheet PDF文件第5页浏览型号PI74FCT162823ATV的Datasheet PDF文件第6页浏览型号PI74FCT162823ATV的Datasheet PDF文件第7页 
PI74FCT16823T  
PI74FCT162823T
PI74FCT162H823T  
Fast CMOS  
18-Bit Registers  
ProductFeatures:  
CommonFeatures:  
• PI74FCT16823TandPI74FCT162823Tarehigh-speed,low  
power devices with high current drive.  
• VCC =5V±10%  
Product Description:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
The PI74FCT16823T, PI74FCT162823T and PI74FCT162H823  
are 18-bit wide registers with clock enable (xCLKEN) and clear  
(xCLR) controls that make these devices especially suitable for  
parity bus interfacing in high-performance systems. The devices  
canbeoperatedastwo9-bitregistersorone18-bitregisterusingthe  
control inputs. Signal pins are arranged in a flow-through  
organization for ease of layout and hysteresis is designed into all  
inputs to improve noise margin.  
• Hysteresis on all inputs  
• Packagesavailable:  
– 56-pin240milwideplasticTSSOP(A)  
– 56-pin300milwidepalsticSSOP(V)  
PI74FCT16823TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit “live insertion”  
The PI74FCT16823T output buffers are designed with a Power-  
Off disable function allowing “live insertion” of boards when the  
devices are used as backplane drives.  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162823TFeatures:  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
The PI74FCT162823T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
PI74FCT162H823TFeatures:  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT162H823T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floatinginputsandeliminatingtheneedforpull-up/downresistors.  
Logic Block Diagram  
1
OE  
CLR  
CLK  
CLKEN  
2
OE  
1
2
CLR  
1
2
CLK  
1
2
CLKEN  
R
R
C
C
D
1Q1  
D
2Q1  
1D1  
2D1  
To 8 other channels  
To 8 other channels  
PS2040A 03/11/96  
1

PI74FCT162823ATV 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT16823ATPACT TI

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18-Bit Registers
SN74ABT16823DLR TI

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18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ABT16823DL TI

类似代替

18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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