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PI74FCT162827BTAX PDF预览

PI74FCT162827BTAX

更新时间: 2024-02-01 13:28:39
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百利通 - PERICOM /
页数 文件大小 规格书
7页 69K
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PI74FCT162827BTAX 数据手册

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PI74FCT16827T  
PI74FCT162827T  
PI74FCT162H827T  
Fast CMOS  
20-Bit Buffers  
ProductFeatures:  
CommonFeatures:  
ProductDescription:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• PI74FCT16827T,PI74FCT162827T,andPI74FCT2H827T  
are high-speed,  
low power devices with high current drive  
• VCC =5V±10%  
ThePI74FCT16827T,PI74FCT162827T,and PI74FCT162H827Tare  
20-bit wide bus drivers designed to provide buffering and high-  
performance bus interfacing for wide data/address paths or buses  
with parity. Two pair of nanded output enable controls allow the  
devices to be operated as two 10-bit buffers or as one 20-bit buffer.  
Signal pins are arranged in a flow-through organization for ease of  
layout and hysteresis is designed into all inputs to improve noise  
margin.  
• Hysteresis on all inputs  
• Packagesavailable:  
– 56-pin240milwideplasticTSSOP(A)  
– 56-pin300milwide plasticSSOP(V)  
PI74FCT16827TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit "live insertion"  
ThePI74FCT16827ToutputbuffersaredesignedwithaPower-Off  
disable function allowing “live insertion” of boards when the  
devices are used as backplane drives.  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
The PI74FCT162827T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
PI74FCT162827TFeatures:  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
ThePI74FCT162H827ThasBusHoldwhichretainstheinput'slast  
state whenever the input goes to high-impedance preventing  
“floating” inputsandeliminatingtheneedforpull-up/downresistors.  
PI74FCT162H827TFeatures:  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
Logic Block Diagram  
1
OE  
1
2
2
OE  
1
2
1OE  
2OE  
1Y1  
1A  
1
2Y1  
2A  
1
To 9 other channels  
To 9 other channels  
PS2041A 03/11/96  
1

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