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PHB23NQ15T PDF预览

PHB23NQ15T

更新时间: 2024-02-28 06:29:08
品牌 Logo 应用领域
恩智浦 - NXP 晶体晶体管
页数 文件大小 规格书
9页 101K
描述
N-channel TrenchMOS transistor

PHB23NQ15T 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:,Reach Compliance Code:unknown
风险等级:5.92配置:Single
最大漏极电流 (Abs) (ID):23 AFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-609代码:e0工作模式:ENHANCEMENT MODE
最高工作温度:175 °C极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):136 W子类别:FET General Purpose Power
表面贴装:YES端子面层:Tin/Lead (Sn/Pb)

PHB23NQ15T 数据手册

 浏览型号PHB23NQ15T的Datasheet PDF文件第1页浏览型号PHB23NQ15T的Datasheet PDF文件第3页浏览型号PHB23NQ15T的Datasheet PDF文件第4页浏览型号PHB23NQ15T的Datasheet PDF文件第5页浏览型号PHB23NQ15T的Datasheet PDF文件第6页浏览型号PHB23NQ15T的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
N-channel TrenchMOS transistor  
PHP23NQ15T, PHB23NQ15T  
AVALANCHE ENERGY LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
EAS Non-repetitive avalanche  
CONDITIONS  
MIN.  
MAX.  
UNIT  
Unclamped inductive load, IAS = 18 A;  
tp = 100 µs; Tj prior to avalanche = 25˚C;  
-
180  
mJ  
energy  
VDD 25 V; RGS = 50 ; VGS = 10 V; refer  
to fig:15  
IAS  
Peak non-repetitive  
avalanche current  
-
23  
A
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-mb  
Thermal resistance junction  
to mounting base  
-
-
1.1  
K/W  
Rth j-a  
Thermal resistance junction SOT78 package, in free air  
to ambient SOT404 package, pcb mounted, minimum  
footprint  
-
-
60  
50  
-
-
K/W  
K/W  
ELECTRICAL CHARACTERISTICS  
Tj= 25˚C unless otherwise specified  
SYMBOL PARAMETER  
V(BR)DSS Drain-source breakdown  
CONDITIONS  
MIN. TYP. MAX. UNIT  
VGS = 0 V; ID = 0.25 mA;  
150  
-
-
-
-
V
V
voltage  
Tj = -55˚C  
133  
VGS(TO)  
Gate threshold voltage  
VDS = VGS; ID = 1 mA  
2
1
-
3
-
4
-
6
V
V
V
Tj = 175˚C  
Tj = -55˚C  
RDS(ON)  
Drain-source on-state  
resistance  
Gate source leakage current VGS = ± 10 V; VDS = 0 V  
Zero gate voltage drain  
current  
VGS = 10 V; ID = 11 A  
-
-
-
-
75  
-
10  
0.05  
-
90  
252  
100  
10  
500  
mΩ  
mΩ  
nA  
µA  
µA  
Tj = 175˚C  
IGSS  
IDSS  
VDS = 150 V; VGS = 0 V;  
Tj = 175˚C  
-
Qg(tot)  
Qgs  
Qgd  
Total gate charge  
Gate-source charge  
Gate-drain (Miller) charge  
ID = 23 A; VDD = 120 V; VGS = 10 V  
-
-
-
44  
9
20  
-
-
-
nC  
nC  
nC  
td on  
tr  
td off  
tf  
Turn-on delay time  
Turn-on rise time  
Turn-off delay time  
Turn-off fall time  
VDD = 75 V; RD = 3.3 ;  
VGS = 10 V; RG = 5.6 Ω  
Resistive load  
-
-
-
-
12  
44  
50  
34  
-
-
-
-
ns  
ns  
ns  
ns  
Ld  
Ld  
Internal drain inductance  
Internal drain inductance  
Measured tab to centre of die  
Measured from drain lead to centre of die  
(SOT78 package only)  
-
-
3.5  
4.5  
-
-
nH  
nH  
Ls  
Internal source inductance  
Measured from source lead to source  
bond pad  
-
7.5  
-
nH  
Ciss  
Coss  
Crss  
Input capacitance  
Output capacitance  
Feedback capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz  
-
-
-
1780  
206  
118  
-
-
-
pF  
pF  
pF  
August 1999  
2
Rev 1.000  

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