PEX 8724, PCI Express Gen 3 Switch, 24 Lanes, 6 Ports
failing CPU and enumerate them in its own domain
without impacting the operation of endpoints already in its
domain.
Error Injection & SerDes Loopback
Using the PEX 8724’s Error Injection feature, users can
inject malformed packets and/or fatal errors into their
system and evaluate a system’s ability to detect and
recover from such errors. The PEX 8724 also supports
Internal Tx, External Tx, Recovered Clock, and Recovered
Data Loopback modes.
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
x4
x4
Applications
x4s
PEX 8724
PEX 8724
Suitable for host-centric as well as peer-to-peer traffic
patterns, the PEX 8724 can be configured for a wide
variety of form factors and applications.
x4s
x4s
Host Centric Fan-out
The PEX 8724, with its symmetric or asymmetric lane
configuration capability, allows user-specific tuning to a
variety of host-centric applications. Figure 6 shows a
server design where, in a quad or multi processor system,
users can assign endpoints/slots to CPU cores to distribute
the system load. The packets directed to different CPU
cores will go to different (user assigned) PEX 8724
upstream ports, allowing better queuing and load balancing
capability for higher performance. Conversely, the PEX
8724 can also be used in single-host mode to simply fan-
out to endpoints.
Figure 7. Host Fail-Over
Fail-Over in Storage Systems with Multicast
The PEX 8724’s Multicast feature can be used to
simultaneously send redundant packets to a backup system
(Figure 8). In the example below, using Multicast (yellow
lines), the CPU sends data to its endpoints as well as to a
backup system (via an NT port) in one transaction as
opposed to having to send multiple transactions to each
endpoint. By offloading the task of backing up data onto
the secondary system, processor and system performance
is enhanced.
CPU
CPU
PCH
Memory
CPU
CPU
PCI
x4 x8
SATA
Backup
System
x1s
PEX 8724
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
Memory
x8
Memory
x4s
x2s
Endpoint
x8
x8
PEX
NT
8724
PEX 8724
PCIe Gen1, Gen2, or Gen3 slots
x4
x4
x4
x4
Figure 6. Host Centric Dual Upstream
NT
NT
Host Failover
PEX 8716
PEX 7616
The PEX 8724 can also be utilized in applications where
host failover is required. In the below application (Figure
7), two hosts may be active simultaneously and controlling
their own domains while exchange status information
through doorbell registers or I2C interface. The devices can
be programmed to trigger fail-over if the heartbeat
x4
x4
x4
x4
FC
FC
FC
FC
Control
Control
Control
Control
Control
Control
8 Disk Chassis
8 Disk Chassis
information is not provided. In the event of a failure, the
surviving device will reset the endpoints connected to the
Figure 8. N+1 Failover
© PLX Technology, www.plxtech.com
Page 4 of 5
10/7/2010, Version 1.0
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