Datasheet > PDM41024

PDM41024

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
8页	295K
描述
1 Megabit Static RAM 128K x 8-Bit

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

PDM41024 数据手册

PDM41024

Low V Data Retention Waveform

Data Retention Mode

4.5V

CDR

CE1

CE2

DON'T CARE

≤ 0.2V

Data Retention Electrical Characteristics (LA Version Only) for JEDEC Version

Symbol Parameter

for Retention Data

Test Conditions

Min.

Typ.

Max.

Unit

—

Data Retention Current

CE1 ≥ V – 0.2V or

= 2V

= 3V

—

500

750

µA

CCDR

CE2 ≤ V + 0.2V

≥ V – 0.2V

or ≤ 0.2V

Chip Deselect to Data Retention Time

Operation Recovery Time

—

CDR

(3)

NOTES: (For three previous Electrical Characteristics tables)

1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage.

2. At any given temperature and voltage condition, t

3. This parameter is sampled.

is less than t

HZCE

LZCE

4. WE is high for a READ cycle.

5. The device is continuously selected. All the Chip Enables are held in their active state.

6. The address is valid prior to or coincident with the latest occurring Chip Enable.

7. Vcc = 5V ± 5%.

Ordering Information

XXXXX

Speed

Device Type Power

Package

Type

Process

Temp. Range

Preferred

Shipping

Container

Blank Tubes

Tape & Reel

Tray

Blank

Commercial (0° to +70°C)

Industrial (-40° to +85°C)

Automotive (-40° to +105°C)

TSO 32-pin 300-mil Plastic SOJ

32-pin 400-mil Plastic SOJ

32-pin Plastic TSOP (I)

Commercial Only

(use 15 ns for slower designs)

Standard Power

Low Power

PDM41024 - 1 Meg (128Kx8) Static RAM

4/09/98 - Rev. 3.3

1...5 6 78

下载PDF

与PDM41024相关器件

型号	品牌	描述	获取价格	数据表
PDM41024L20L32	ETC	x8 SRAM	获取价格
PDM41024L20L32I	ETC	x8 SRAM	获取价格
PDM41024L25L32	ETC	x8 SRAM	获取价格
PDM41024L25L32I	ETC	x8 SRAM	获取价格
PDM41024L35L32	ETC	x8 SRAM	获取价格
PDM41024LA10SO	IXYS	Standard SRAM, 128KX8, 10ns, CMOS, PDSO32	获取价格