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PCS2I99447G-32-LR PDF预览

PCS2I99447G-32-LR

更新时间: 2024-01-03 13:02:15
品牌 Logo 应用领域
PULSECORE 时钟驱动器逻辑集成电路
页数 文件大小 规格书
14页 561K
描述
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer

PCS2I99447G-32-LR 技术参数

生命周期:Obsolete包装说明:GREEN, LQFP-32
Reach Compliance Code:unknown风险等级:5.84
系列:99447输入调节:DIFFERENTIAL
JESD-30 代码:S-PQFP-G32长度:9 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER功能数量:1
反相输出次数:端子数量:32
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
传播延迟(tpd):4.4 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.15 ns座面最大高度:1.6 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
宽度:9 mmBase Number Matches:1

PCS2I99447G-32-LR 数据手册

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September 2006  
rev 0.4  
PCS2I99447  
3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer  
Features  
PCS2I99447 is specifically designed to distribute LVCMOS  
compatible clock signals up to a frequency of 350 MHz.  
Each output provides a precise copy of the input signal with  
a near zero skew. The outputs buffers support driving of  
50terminated transmission lines on the incident edge:  
each is capable of driving either one parallel terminated or  
two series terminated transmission lines.  
9 LVCMOS Compatible Clock Outputs  
2 Selectable, LVCMOS Compatible Inputs  
Maximum Clock Frequency of 350 MHz  
Maximum Clock Skew of 150 pS  
Synchronous Output Stop in Logic Low State  
Eliminates Output Runt Pulses  
Two selectable independent LVCMOS compatible clock  
inputs are available, providing support of redundant clock  
source systems. The PCS2I99447 CLK_STOP control is  
synchronous to the falling edge of the input clock. It allows  
the start and stop of the output clock signal only in a logic  
low state, thus eliminating potential output runt pulses.  
Applying the OE control will force the outputs into high  
impedance mode.  
High–Impedance Output Control  
3.3V or 2.5V Power Supply  
Drives up to 18 Series Terminated Clock Lines  
Ambient Temperature Range -40°C to +85°C  
32 Lead LQFP and TQFP Packaging  
Supports Clock Distribution in Networking,  
Telecommunications and Computer Applications  
Pin and Function Compatible to MPC947 and  
MPC9447  
All inputs have an internal pull–up or pull–down resistor  
preventing unused and open inputs from floating. The  
device supports a 2.5V or 3.3V power supply and an  
ambient temperature range of –40°C to +85°C. The  
PCS2I99447 is pin and function compatible but  
performance enhanced to the MPC947 and MPC9447.  
Functional Description  
The PCS2I99447 is a 3.3V or 2.5V compatible, 1:9 clock  
fanout buffer targeted for high performance clock tree  
applications. With output frequencies up to 350 MHz and  
output skews less than 150 pS, the device meets the needs  
of most demanding clock applications.  
PulseCore Semiconductor Corporation  
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018  
www.pulsecoresemi.com  
Notice: The information in this document is subject to change without notice.  

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