Datasheet > PCS2P20807A

PCS2P20807A

更新时间： 2024-02-05 04:50:00

品牌	Logo	应用领域
PULSECORE		时钟驱动器
页数	文件大小	规格书
11页	458K
描述
2.5V CMOS 1-TO-10 CLOCK DRIVER

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数据手册

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PCS2P20807A 数据手册

September 2006

rev 0.3

PCS2P20807A

2.5V CMOS 1-TO-10 CLOCK DRIVER

Product Description

Features

•

High frequency > 150MHz

The PCS2P20807A is a 2.5V compatible, high speed, low

noise, 1:10 fanout, non-inverting clock buffer. The large

fanout from a single input reduces loading on the preceding

driver and provides an efficient clock distribution network.

Guaranteed low skew < 150pS (max.) between

any two outputs

•

Very low duty cycle distortion < 300pS

High speed: propagation delay < 3nS

Very low CMOS power levels

TTL compatible inputs and outputs

1:10 fanout

Providing output to output skew as low as 150pS, the

PCS20807A is an ideal clock distribution device for

synchronous systems. Multiple power and grounds reduce

noise. Typical applications are clock and signal distribution.

Maximum output rise and fall time < 1.25nS

(max.)

•

Low input capacitance: 3pF (typ)

2.5V Supply Voltage

Available in SSOP and QSOP Packages

Block Diagram

O₁

O₂

O₃

O₄

O₅

O₆

O₇

O₈

O₉

O₁₀

PulseCore Semiconductor Corporation

1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018

www.pulsecoresemi.com

Notice: The information in this document is subject to change without notice.

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