5秒后页面跳转
PCA9561PW/G,118 PDF预览

PCA9561PW/G,118

更新时间: 2024-02-28 11:03:22
品牌 Logo 应用领域
恩智浦 - NXP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器PC
页数 文件大小 规格书
26页 716K
描述
PCA9561 - Quad 6-bit multiplexed I²C-bus EEPROM DIP switch TSSOP2 20-Pin

PCA9561PW/G,118 技术参数

Source Url Status Check Date:2013-06-14 00:00:00生命周期:Obsolete
零件包装代码:TSSOP2包装说明:4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20
针数:20Reach Compliance Code:unknown
风险等级:5.74Base Number Matches:1

PCA9561PW/G,118 数据手册

 浏览型号PCA9561PW/G,118的Datasheet PDF文件第2页浏览型号PCA9561PW/G,118的Datasheet PDF文件第3页浏览型号PCA9561PW/G,118的Datasheet PDF文件第4页浏览型号PCA9561PW/G,118的Datasheet PDF文件第5页浏览型号PCA9561PW/G,118的Datasheet PDF文件第6页浏览型号PCA9561PW/G,118的Datasheet PDF文件第7页 
PCA9561  
Quad 6-bit multiplexed I2C-bus EEPROM DIP switch  
Rev. 4 — 6 November 2012  
Product data sheet  
1. General description  
The PCA9561 is a 20-pin CMOS device consisting of four 6-bit non-volatile EEPROM  
registers, six hardware pin inputs and a 6-bit multiplexed output. It is used for DIP  
switch-free or jumper-less system configuration and supports Mobile and Desktop VID  
Configuration, where five preset values (four sets of internal non-volatile registers and  
one set of external hardware pins) set processor voltage for operation in various  
performance or battery conservation sleep modes. The PCA9561 is also useful in server  
and telecommunications/networking applications when used to replace DIP switches or  
jumpers, since the settings can be easily changed via I2C-bus/SMBus without having to  
power down the equipment to open the cabinet. The non-volatile memory retains the most  
current setting selected before the power is turned off.  
The PCA9561 typically resides between the CPU and Voltage Regulator Module (VRM)  
when used for CPU VID (Voltage IDentification code) configuration. It is used to bypass  
the CPU-defined VID values and provide a different set of VID values to the VRM, if an  
increase in the CPU voltage is desired. An increase in CPU voltage combined with an  
increase in CPU frequency leads to a performance boost of up to 7.5 %. Lower CPU  
voltage reduces power consumption. The main advantage of the PCA9561 over older  
devices, such as the PCA9559 or PCA9560, is that it contains four internal non-volatile  
EEPROM registers instead of just one or two, allowing five independent settings which  
allows a more accurate CPU voltage tuning depending on specific applications.  
The PCA9561 has two address pins, allowing up to four devices to be placed on the same  
I2C-bus or SMBus.  
2. Features and benefits  
Selection of non-volatile register_n as source to MUX_OUT pins via I2C-bus  
I2C-bus can override MUX_SELECT pin in selecting output source  
6-bit 5-to-1 multiplexer DIP switch  
Four internal non-volatile registers  
Internal non-volatile registers programmable and readable via I2C-bus  
Six open-drain multiplexed outputs  
400 kHz maximum clock frequency  
Operating supply voltage 3.0 V to 3.6 V  
5 V and 2.5 V tolerant inputs/outputs  
Useful for Speed Step configuration of laptop computer  
Two address pins, allowing up to four devices on the I2C-bus  
MUX_IN values readable via I2C-bus  
 
 

与PCA9561PW/G,118相关器件

型号 品牌 获取价格 描述 数据表
PCA9561PW-T NXP

获取价格

IC QUAD 6 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO20, 4.40 MM, PLASTIC, MO-153, SOT-3
PCA9564 NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564_06 NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564BS NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564D NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564D,118 NXP

获取价格

PCA9564 - Parallel bus to I2C-bus controller SOP 20-Pin
PCA9564N NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564N,112 NXP

获取价格

PCA9564 - Parallel bus to I2C-bus controller DIP 20-Pin
PCA9564PW NXP

获取价格

Parallel bus to I2C-bus controller
PCA9564PW,112 NXP

获取价格

PCA9564 - Parallel bus to I2C-bus controller TSSOP2 20-Pin