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PCA9536DR PDF预览

PCA9536DR

更新时间: 2024-01-14 16:17:15
品牌 Logo 应用领域
德州仪器 - TI 并行IO端口微控制器和处理器外围集成电路光电二极管PC时钟
页数 文件大小 规格书
25页 476K
描述
REMOTE 4-BIT I2C AND SMBus I/O EXPANDER WITH CONFIGURATION REGISTERS

PCA9536DR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:VFBGA, BGA8,2X4,20针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.71
JESD-30 代码:R-XBGA-B8JESD-609代码:e1
长度:1.98 mm湿度敏感等级:1
位数:4I/O 线路数量:4
端口数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:VFBGA
封装等效代码:BGA8,2X4,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:2.5/5 V认证状态:Not Qualified
座面最大高度:0.5 mm子类别:Parallel IO Ports
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PCA9536DR 数据手册

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PCA9536  
REMOTE 4-BIT I2C AND SMBus I/O EXPANDER  
WITH CONFIGURATION REGISTERS  
www.ti.com  
SCPS125CAPRIL 2006REVISED NOVEMBER 2006  
DESCRIPTION/ORDERING INFORMATION (CONTINUED)  
This 4-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It  
provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial  
clock (SCL), serial data (SDA)].  
The PCA9536 features 4-bit Configuration (input or output selection), Input Port, Output Port, and Polarity  
Inversion (active high or active low) registers. At power on, the I/Os are configured as inputs with a weak pullup  
to VCC. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O  
configuration bits. If no signals are applied externally to the PCA9536, the voltage level is 1, or high, because of  
the internal pullup resistors. The data for each input or output is stored in the corresponding Input Port or Output  
Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All  
registers can be read by the system master.  
The system master can reset the PCA9536 in the event of a timeout or other improper operation by utilizing the  
power-on reset feature, which puts the registers in their default state and initializes the I2C/SMBus state  
machine.  
The device's outputs (latched) have high-current drive capability for directly driving LEDs. It has low current  
consumption.  
TERMINAL FUNCTIONS  
NO.  
NAME  
DESCRIPTION  
D, DGK, AND  
YZP PACKAGE  
DCU PACKAGE  
1
2
3
4
5
6
7
8
4
3
2
1
8
7
6
5
P0  
P1  
P-port input/output. Push-pull design structure.  
P-port input/output. Push-pull design structure.  
P-port input/output. Push-pull design structure.  
Ground  
P2  
GND  
P3  
P-port input/output. Push-pull design structure.  
Serial clock bus. Connect to VCC through a pullup resistor.  
Serial data bus. Connect to VCC through a pullup resistor.  
Supply voltage  
SCL  
SDA  
VCC  
2
Submit Documentation Feedback  

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