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PCA9503A PDF预览

PCA9503A

更新时间: 2022-03-24 16:54:25
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
8页 727K
描述
Smart, simple solutions for the 12 most common design concerns

PCA9503A 数据手册

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I2C-bus: The serial revolution  
By replacing complex parallel interfaces with a straightforward yet powerful serial  
structure, the I2C-bus revolutionized chip-to-chip communications.  
SDA  
SCL  
uC  
Invented by NXP (Philips) more than 30 years ago, the I2C-bus uses a simple two-wire  
format to carry data one bit at a time. It performs inter-chip addressing, selection,  
control, and data transfer. Speeds are up to 400 kHz (Fast-mode), 1 MHz (Fast-mode  
Plus), 3.4 MHz (High Speed-mode), or 5 MHz (Ultra Fast-mode).  
Parallel Interface  
I2C Serial Interface  
The I2C-bus shrinks the IC footprint and leads to lower IC costs. Plus, since far fewer  
copper traces are needed, it enables a smaller PCB, reduces design complexity, and  
lowers system cost.  
A/D  
D/A  
MCU  
I/O  
LCD  
RTC  
MCU  
A0  
A1  
A2  
New  
function  
1010A2A1A0R/W  
New function address  
1010011 R/W  
New function address  
as assigned  
I2C-bus devices are available in a wide range of functions. Each slave device has its own I2C-bus address, selectable using  
address pins set high (1) or low (0). Information is transmitted byte by byte, and each byte is acknowledged by the receiver.  
There can be multiple devices on the same bus, and more than one IC can act as master. The master role is typically played by a  
microcontroller.  
Write data  
Master  
transmitter  
Slave  
SDA  
SCL  
SDA  
SCL  
receiver  
S
slave address  
W
R
A
A
data  
A
data  
A
A
P
P
<
n data bytes  
>
Read data  
receiver  
transmitter  
S
slave address  
data  
n data  
A
data  
last data byte  
<
>
The master always sends the clock  
bytes  
S = Start condition R/W = read/write  
A = Acknowledge A = Not acknowledge P = Stop condition  

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