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PCA9501PW

更新时间： 2024-02-18 01:43:27
品牌 Logo 应用领域
恩智浦 - NXP 并行IO端口微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 147K
描述
8-bit I2C and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pins

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PCA9501PW 技术参数

Source Url Status Check Date：2013-06-14 00:00:00是否无铅： 含铅
是否Rohs认证： 符合生命周期：Obsolete
包装说明：TSSOP, TSSOP20,.25Reach Compliance Code：unknown
风险等级：5.31JESD-30 代码：R-PDSO-G20
长度：6.5 mm位数：8
I/O 线路数量：8端口数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：3.3 V认证状态：Not Qualified
座面最大高度：1.1 mm子类别：Parallel IO Port
最大供电电压：3.6 V最小供电电压：2.5 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：4.4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

PCA9501PW 数据手册

 浏览型号PCA9501PW的Datasheet PDF文件第6页浏览型号PCA9501PW的Datasheet PDF文件第7页浏览型号PCA9501PW的Datasheet PDF文件第8页浏览型号PCA9501PW的Datasheet PDF文件第10页浏览型号PCA9501PW的Datasheet PDF文件第11页浏览型号PCA9501PW的Datasheet PDF文件第12页 
Philips Semiconductors  
Product data  
8-bit I2C and SMBus I/O port with interrupt,  
2-kbit EEPROM and 6 address pins  
PCA9501  
the word address and the eight bits after the word address as the  
data. The PCA9501 will issue an acknowledge after the receipt of  
both the word address and the data. To terminate the data transfer  
the master issues the stop condition, initiating the internal write cycle  
to the non-volatile memory. Only write and read operations to the  
quasi-bidirectional I/Os are allowed during the internal write cycle.  
MEMORY OPERATIONS  
Write operations  
Write operations require an additional address field to indicate the  
memory address location to be written. The address field is eight  
bits long providing access to any one of the 256 words of memory.  
There are two types of write operations, byte write and page write.  
Page Write (see Figure 12)  
Write operation is possible when WC control pin put at a low logic  
level (0). When this control signal is set at 1, write operation is not  
possible and data in the memory is protected.  
A page write is initiated in the same way as the byte write, if after  
sending the first word of data, the stop condition is not received the  
PCA9501 considers subsequent words as data. After each data  
word the PCA9501 responds with an acknowledge and the four  
least significant bits of the memory address field are incremented.  
Should the master not send a stop condition after 16 data words the  
address counter will return to its initial value and overwrite the data  
previously written. After the receipt of the stop condition the inputs  
will behave as with the byte write during the internal write cycle.  
Byte Write and Page Write explained below assume that Write  
Control pin (WC) is set to 0.  
Byte Write (see Figure 11)  
To perform a byte write the start condition is followed by the memory  
slave address and the R/W bit set to 0. The PCA9501 will respond  
with an acknowledge and then consider the next eight bits sent as  
SLAVE ADDRESS (MEMORY)  
WORD ADDRESS  
DATA  
SDA  
S
1
A5 A4 A3 A2 A1 A0  
0
A
A
A
P
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
STOP CONDITION.  
WRITE TO THE  
MEMORY IS  
PERFORMED  
SW00651  
Figure 11. Byte write  
SLAVE ADDRESS (MEMORY)  
DATA TO MEMORY  
DATA n  
DATA TO MEMORY  
WORD ADDRESS  
DATA n + 3  
SDA  
S
1
A5 A4 A3 A2 A1 A0  
0
A
A
A
A
P
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
STOP CONDITION.  
WRITE TO THE MEMORY  
IS PERFORMED  
SW00652  
Figure 12. Page Write  
9
2003 Sep 12  
1...6789101112...22

中文翻译

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PCA9501PW 替代型号

型号 品牌 替代类型 描述 数据表
PCA9501D,112 NXP

完全替代

 PCA9501 - 8-bit I2C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pin

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