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PCA9501PW

更新时间： 2024-01-15 06:45:43
品牌 Logo 应用领域
恩智浦 - NXP 并行IO端口微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 147K
描述
8-bit I2C and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pins

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中文翻译

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PCA9501PW 技术参数

Source Url Status Check Date：2013-06-14 00:00:00是否无铅： 含铅
是否Rohs认证： 符合生命周期：Obsolete
包装说明：TSSOP, TSSOP20,.25Reach Compliance Code：unknown
风险等级：5.31JESD-30 代码：R-PDSO-G20
长度：6.5 mm位数：8
I/O 线路数量：8端口数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：3.3 V认证状态：Not Qualified
座面最大高度：1.1 mm子类别：Parallel IO Port
最大供电电压：3.6 V最小供电电压：2.5 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：4.4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

PCA9501PW 数据手册

 浏览型号PCA9501PW的Datasheet PDF文件第7页浏览型号PCA9501PW的Datasheet PDF文件第8页浏览型号PCA9501PW的Datasheet PDF文件第9页浏览型号PCA9501PW的Datasheet PDF文件第11页浏览型号PCA9501PW的Datasheet PDF文件第12页浏览型号PCA9501PW的Datasheet PDF文件第13页 
Philips Semiconductors  
Product data  
8-bit I2C and SMBus I/O port with interrupt,  
2-kbit EEPROM and 6 address pins  
PCA9501  
The master must perform a byte write to the address location to be  
read, but instead of transmitting the data after receiving the  
acknowledge from the PCA9501 the master reissues the start  
condition and memory slave address with the R/W bit set to one.  
The PCA9501 will then transmit an acknowledge and use the next  
eight clock cycles to transmit the data contained in the addressed  
location. The master ceases the transmission by issuing the stop  
condition after the eighth bit, omitting the ninth clock cycle  
acknowledge.  
Read operations  
PCA9501 read operations are initiated in an identical manner to  
write operations with the exception that the memory slave address’  
R/W bit is set to a one. There are three types of read operations;  
current address, random and sequential.  
Current Address Read (see Figure 13)  
The PCA9501 contains an internal address counter that increments  
after each read or write access, as a result if the last word accessed  
was at address n then the address counter contains the address  
n+1.  
Sequential Read (see Figure 15)  
The PCA9501 sequential read is an extension of either the current  
address read or random read. If the master doesn’t issue a stop  
condition after it has received the eighth data bit, but instead issues  
an acknowledge, the PCA9501 will increment the address counter  
and use the next eight cycles to transmit the data from that location.  
The master can continue this process to read the contents of the  
entire memory. Upon reaching address 255 the counter will return to  
address 0 and continue transmitting data until a stop condition is  
received. The master ceases the transmission by issuing the stop  
condition after the eighth bit, omitting the ninth clock cycle  
acknowledge.  
When the PCA9501 receives its memory slave address with the  
R/W bit set to one it issues an acknowledge and uses the next eight  
clocks to transmit the data contained at the address stored in the  
address counter. The master ceases the transmission by issuing the  
stop condition after the eighth bit. There is no ninth clock cycle for  
the acknowledge.  
Random Read (see Figure 14)  
The PCA9501’s random read mode allows the address to be read  
from to be specified by the master. This is done by performing a  
dummy write to set the address counter to the location to be read.  
SLAVE ADDRESS (MEMORY)  
DATA FROM MEMORY  
SDA  
S
1
A5 A4 A3 A2 A1 A0  
1
A
P
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
STOP  
CONDITION  
SW00653  
Figure 13. Current Address Read  
SLAVE ADDRESS (MEMORY)  
SLAVE ADDRESS (MEMORY)  
WORD ADDRESS  
DATA FROM MEMORY  
SDA  
P
S
1
A5 A4 A3 A2 A1 A0  
A
A
S
1
A5 A4 A3 A2 A1 A0  
A
0
1
ACKNOWLEDGE  
FROM SLAVE  
R/W  
R/W  
START  
CONDITION  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
START  
CONDITION  
SW00654  
Figure 14. Random Read  
SLAVE ADDRESS (MEMORY)  
DATA FROM MEMORY  
DATA FROM MEMORY  
DATA FROM MEMORY  
SDA  
P
S
1
A5 A4 A3 A2 A1 A0  
A
A
A
1
DATA n  
DATA n+1  
DATA n+X  
R/W  
START CONDITION  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM MASTER  
ACKNOWLEDGE  
FROM MASTER  
SW00655  
Figure 15. Sequential Read  
10  
2003 Sep 12  
1...78910111213...22

中文翻译

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PCA9501PW 替代型号

型号 品牌 替代类型 描述 数据表
PCA9501D,112 NXP

完全替代

 PCA9501 - 8-bit I2C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pin

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