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P89LPC972FDH

更新时间: 2024-01-01 20:27:33
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器时钟
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66页 442K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash

P89LPC972FDH 数据手册

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P89LPC970/971/972  
NXP Semiconductors  
8-bit microcontroller with accelerated two-clock 80C51 core  
6.2 Pin description  
Table 3.  
Symbol  
Pin description  
Pin  
Type Description  
DIP20,  
TSSOP20  
P0.0 to P0.7  
I/O  
Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. During reset  
Port 0 latches are configured in the input-only mode with the internal pull-up  
disabled. The operation of Port 0 pins as inputs and outputs depends upon the port  
configuration selected. Each port pin is configured independently. Refer to Section  
7.16.1 “Port configurations” and Table 11 “Static characteristics” for details.  
The Keypad Interrupt feature operates with Port 0 pins.  
All pins have Schmitt trigger inputs.  
Port 0 also provides various special functions as described below:  
P0.0 — Port 0 bit 0.  
P0.0/CMP2/KBI0/  
SPICLK  
1
I/O  
O
CMP2 — Comparator 2 output  
I
KBI0 — Keyboard input 0.  
I/O  
SPICLK — SPI clock. When configured as master, this pin is output; when  
configured as slave, this pin is input (pin remap).  
P0.1/CIN2B/  
KBI1  
20  
19  
18  
I/O  
P0.1 — Port 0 bit 1.  
I
CIN2B — Comparator 2 positive input B.  
KBI1 — Keyboard input 1.  
I
P0.2/CIN2A/  
KBI2  
I/O  
P0.2 — Port 0 bit 2.  
I
CIN2A — Comparator 2 positive input A.  
KBI2 — Keyboard input 2.  
I
P0.3/CIN1B/  
KBI3/T2  
I/O  
P0.3 — Port 0 bit 3. High current source.  
CIN1B — Comparator 1 positive input B.  
KBI3 — Keyboard input 3.  
I
I
I/O  
T2 — Timer/counter 2 external count input or overflow output.  
P0.4 — Port 0 bit 4. High current source.  
CIN1A — Comparator 1 positive input A.  
KBI4 — Keyboard input 4.  
P0.4/CIN1A/  
KBI4  
17  
16  
I/O  
I
I
P0.5/CMPREF/  
KBI5/T3  
I/O  
P0.5 — Port 0 bit 5. High current source.  
CMPREF — Comparator reference (negative) input.  
KBI5 — Keyboard input 5.  
I
I
I/O  
T3 — Timer/counter 3 external count input or overflow output.  
P89LPC97X_2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 27 April 2010  
7 of 66  

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