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P87C654X2FA,512

更新时间： 2024-02-24 21:49:02
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
88页 490K
描述
P83C654X2/P87C654X2 - 80C51 8-bit microcontroller family LCC 44-Pin

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P87C654X2FA,512 技术参数

生命周期：Active零件包装代码：LCC
包装说明：PLASTIC, MS-018, SOT-187-2, LCC-44针数：44
Reach Compliance Code：unknown风险等级：5.77
Is Samacsys：NBase Number Matches：1

P87C654X2FA,512 数据手册

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Philips Semiconductors  
Product data  
80C51 8-bit microcontroller family 16 kB OTP/ROM,  
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed  
(30/33 MHz)  
P83C654X2/P87C654X2  
– Clock can be stopped and resumed  
– Idle mode  
– Power-down mode  
• CMOS and TTL compatible  
DESCRIPTION  
• Two speed ranges at V = 5 V  
CC  
The devices are Single-Chip 8-Bit Microcontrollers manufactured in  
an advanced CMOS process and are derivatives of the 80C51  
microcontroller family. The instruction set is 100 % compatible with  
the 80C51 instruction set.  
– 0 to 30 MHz with 6-clock operation  
– 0 to 33 MHz with 12-clock operation  
• Parallel programming with 87C51 compatible hardware interface  
to programmer  
The devices support 6-clock/12-clock mode selection by  
programming an OTP bit (OX2) using parallel programming. In  
addition, an SFR bit (X2) in the clock control register (CKCON)  
also selects between 6-clock/12-clock mode.  
• RAM expandable externally to 64 kbytes  
• PLCC and LQFP packages  
• Extended temperature ranges  
• Dual Data Pointers  
The devices also have four 8-bit I/O ports, three 16-bit timer/event  
counters, a multi-source, four-priority-level, nested interrupt structure,  
an enhanced UART and on-chip oscillator and timing circuits.  
• Security bits (3 bits)  
The added features of the P8xC654X2 make it a powerful  
microcontroller for applications that require pulse width modulation,  
high-speed I/O and up/down counting capabilities such as motor  
control.  
• Encryption array - 64 bytes  
• Seven interrupt sources  
• Four interrupt priority levels  
• Four 8-bit I/O ports  
FEATURES  
• 80C51 Central Processing Unit  
– 16 kbytes OTP  
• Full-duplex enhanced UART  
– Framing error detection  
– 256 byte RAM  
– Automatic address recognition  
– Boolean processor  
• Three 16-bit timers/counters T0, T1 (standard 80C51) and  
– Fully static operation  
additional T2 (capture and compare)  
– Low voltage (2.7 V to 5.5 V at 16 MHz) operation  
• Programmable clock-out pin  
• Asynchronous port reset  
• 12-clock operation with selectable 6-clock operation (via software  
or via parallel programmer)  
• Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock  
• Memory addressing capability  
– Up to 64 kbytes ROM and 64 kbytes RAM  
mode)  
• Wake-up from power-down by an external interrupt  
• Watchdog timer  
• Power control modes:  
ORDERING INFORMATION  
Temp Range  
(°C)  
Type number  
Package  
Name  
OTP  
ROM  
RAM  
256B  
256B  
Description  
plastic leaded chip carrier; 44 leads  
Version  
P83C654X2FA  
–
–
16 KB  
16 KB  
PLCC44  
LQFP44  
SOT187–2 –40 to +85  
P83C654X2BBD  
plastic low profile quad flat package; 44 leads; SOT389–1 0 to +70  
body 10   10   1.4 mm  
P87C654X2FA  
16 KB  
16 KB  
–
–
256B  
256B  
PLCC44  
LQFP44  
plastic leaded chip carrier; 44 leads  
SOT187–2 –40 to +85  
P87C654X2BBD  
plastic low profile quad flat package; 44 leads; SOT389–1 0 to +70  
body 10   10   1.4 mm  
2
2004 Apr 20  
1234567...88

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