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P6KE100AG PDF预览

P6KE100AG

更新时间: 2024-02-25 11:09:16
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 局域网二极管电视
页数 文件大小 规格书
8页 752K
描述
600W, UNIDIRECTIONAL, SILICON, TVS DIODE, LEAD FREE, PLASTIC, CASE 017AA-01, 2 PIN

P6KE100AG 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:LEAD FREE, PLASTIC, CASE 017AA-01, 2 PIN针数:2
Reach Compliance Code:unknown风险等级:5.58
其他特性:EXCELLENT CLAMPING CAPABILITY, HIGH RELIABILITY, UL RECOGNIZED最大击穿电压:105 V
最小击穿电压:95 V外壳连接:ISOLATED
配置:SINGLE二极管元件材料:SILICON
二极管类型:TRANS VOLTAGE SUPPRESSOR DIODEJESD-30 代码:O-PALF-W2
JESD-609代码:e3湿度敏感等级:NOT SPECIFIED
最大非重复峰值反向功率耗散:600 W元件数量:1
端子数量:2封装主体材料:PLASTIC/EPOXY
封装形状:ROUND封装形式:LONG FORM
峰值回流温度(摄氏度):260极性:UNIDIRECTIONAL
最大功率耗散:5 W认证状态:COMMERCIAL
最大重复峰值反向电压:85.5 V表面贴装:NO
技术:AVALANCHE端子面层:MATTE TIN
端子形式:WIRE端子位置:AXIAL
处于峰值回流温度下的最长时间:40Base Number Matches:1

P6KE100AG 数据手册

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P6KE6.8A Series  
APPLICATION NOTES  
RESPONSE TIME  
minimum lead lengths and placing the suppressor device as  
close as possible to the equipment or components to be  
protected will minimize this overshoot.  
In most applications, the transient suppressor device is  
placed in parallel with the equipment or component to be  
protected. In this situation, there is a time delay associated  
with the capacitance of the device and an overshoot  
condition associated with the inductance of the device and  
the inductance of the connection method. The capacitance  
effect is of minor importance in the parallel protection  
scheme because it only produces a time delay in the  
transition from the operating voltage to the clamp voltage as  
shown in Figure 7.  
The inductive effects in the device are due to actual  
turn-on time (time required for the device to go from zero  
current to full current) and lead inductance. This inductive  
effect produces an overshoot in the voltage across the  
equipment or component being protected as shown in  
Figure 8. Minimizing this overshoot is very important in the  
application, since the main purpose for adding a transient  
suppressor is to clamp voltage spikes. The P6KE6.8A series  
has very good response time, typically < 1 ns and negligible  
inductance. However, external inductive effects could  
produce unacceptable overshoot. Proper circuit layout,  
Some input impedance represented by Z is essential to  
in  
prevent overstress of the protection device. This impedance  
should be as high as possible, without restricting the circuit  
operation.  
DUTY CYCLE DERATING  
The data of Figure 1 applies for non-repetitive conditions  
and at a lead temperature of 25°C. If the duty cycle increases,  
the peak power must be reduced as indicated by the curves  
of Figure 6. Average power must be derated as the lead or  
ambient temperature rises above 25°C. The average power  
derating curve normally given on data sheets may be  
normalized and used for this purpose.  
At first glance the derating curves of Figure 6 appear to be  
in error as the 10 ms pulse has a higher derating factor than  
the 10 ms pulse. However, when the derating factor for a  
given pulse of Figure 6 is multiplied by the peak power value  
of Figure 1 for the same pulse, the results follow the  
expected trend.  
TYPICAL PROTECTION CIRCUIT  
Z
in  
LOAD  
V
in  
V
L
V
in  
(TRANSIENT)  
OVERSHOOT DUE TO  
INDUCTIVE EFFECTS  
V
V
V
in  
(TRANSIENT)  
V
L
V
L
V
in  
t
d
t
= TIME DELAY DUE TO CAPACITIVE EFFECT  
t
D
t
Figure 7.  
Figure 8.  
http://onsemi.com  
5
 

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