Datasheet > P4C164L-35P6MLF

P4C164L-35P6MLF

更新时间： 2023-05-15 00:00:00

品牌	Logo	应用领域
PYRAMID		静态存储器光电二极管
页数	文件大小	规格书
16页	1239K
描述
Standard SRAM, 8KX8, 35ns, CMOS, PDIP28, 0.600 INCH, ROHS COMPLIANT, PLASTIC, DIP-28

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P4C164L-35P6MLF 数据手册

P4C164 - ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAM

TIMIꢀG WAVEFORM OF READ CYCLE ꢀO. 1 (OE COꢀTROLLED)⁽⁵⁾

TIMIꢀG WAVEFORM OF READ CYCLE ꢀO. 2 (ADDRESS COꢀTROLLED)^(5,6)

TIMIꢀG WAVEFORM OF READ CYCLE ꢀO. 3 (CE₁, CE₂COꢀTROLLED)^(5,7,10)

5. WE is HIGH for READ cycle.

9. Read Cycle Time is measured from the last valid address to the ﬁrst

6. CE₁is LOW, CE₂is HIGH and OE is LOW for READ cycle.

7. ADDRESS must be valid prior to, or coincident with CE₁transition LOW

and CE₂transition HIGH.

transitioning address.

10. Transitions caused by a chip enable control have similar delays ir-

respective of whether CE₁or CE₂causes them.

8. Transition is measured ± 200 mV from steady state voltage prior to

change,withloadingasspeciﬁedinFigure1. Thisparameterissampled

and not 100% tested.

Document # SRAM115 REV H

Page 5

1 2 3 456 7 8...16

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型号	品牌	描述	获取价格	数据表
P4C164L-35PC	PYRAMID	Standard SRAM, 8KX8, 35ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28	获取价格
P4C164L-35PCLF	PYRAMID	Standard SRAM, 8KX8, 35ns, CMOS, PDIP28, 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-28	获取价格
P4C164L-35PM	PYRAMID	Standard SRAM, 8KX8, 35ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28	获取价格
P4C164L-35PMB	PYRAMID	Standard SRAM, 8KX8, 35ns, CMOS, PDIP28, 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-28	获取价格
P4C164L-45CC	PYRAMID	Standard SRAM, 8KX8, 45ns, CMOS, CDIP28, 0.300 INCH, ROHS COMPLIANT, CERAMIC, SIDE BRAZED,	获取价格
P4C164L-45CCLF	PYRAMID	Standard SRAM, 8KX8, 45ns, CMOS, CDIP28, 0.300 INCH, ROHS COMPLIANT, CERAMIC, SIDE BRAZED,	获取价格