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OXU200-LQAG PDF预览

OXU200-LQAG

更新时间: 2024-01-31 05:27:39
品牌 Logo 应用领域
PLX /
页数 文件大小 规格书
16页 632K
描述
Micro Peripheral IC,

OXU200-LQAG 技术参数

生命周期:TransferredReach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.63
Base Number Matches:1

OXU200-LQAG 数据手册

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OXU200 Data Sheet  
Oxford Semiconductor, Inc.  
Device  
Overview  
The Oxford Semiconductor OXU200 is a lowcost, singleport USB  
highspeed peripheral controller. It is designed for high performance and  
enables embedded systems to perform highspeed USB data transfers for  
peripheral connectivity when connected to a USB host.  
The lowpower, highperformance design and small package size make  
the OXU200 ideal for adding highspeed USB into a broad range of  
mobile consumer electronics, including cell phones, portable GPS  
devices, and PDAs.  
The OXU200 has a 16bit SRAMlike memorymapped interface and  
flexible I/O voltage that can connect gluelessly to most popular CPUs  
and DSPs. The 8 Kbytes of onchip SRAM buffer is cost and performance  
optimized to reduce system interrupts and minimize processor  
overhead.  
Software solutions for the OXU200 include USB device drivers and the  
Oxford Semiconductor USBLinkTM product suite. USBLink Peripheral  
has been ported to a wide variety of real time operating systems  
including VxWorks®, ThreadX®, and Nucleus®.  
In addition, Oxford Semiconductor also makes available lowlevel  
controller drivers for other native USB stacks such as those included with  
Windows® CE 5.0 and Linux® 2.6.x.  
Figure 1 shows the OXU200 architectural diagram.  
Figure 1 OXU200 Architectural Diagram  
Clock/  
OSC1  
Osc Pads  
and Clk  
OSC2  
Div  
System Configuration  
& Control Registers  
ACK  
REQ  
DMA  
Interface  
USB Peripheral  
Controller Registers  
DP  
DM  
/RESET  
USB  
Peripheral  
Controller  
HS USB  
XCVR  
/CS  
/WR  
/RD  
INT  
VBUS  
µP  
Interface  
8 Kbyte  
Memory  
A[10:1]  
D[15:0]  
2
External—Free Release  
DS-0051 Mar 07  

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