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OR3T125-6BC432I PDF预览

OR3T125-6BC432I

更新时间： 2024-02-16 14:28:43
品牌 Logo 应用领域
杰尔 - AGERE 现场可编程门阵列可编程逻辑栅
页数 文件大小 规格书
210页 4391K
描述
3C and 3T Field-Programmable Gate Arrays

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OR3T125-6BC432I 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：BGA, BGA432,31X31,50
针数：432Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.88
Is Samacsys：N其他特性：TYP GATES = 92000 TO 186000
最大时钟频率：80 MHzCLB-Max的组合延迟：1.35 ns
JESD-30 代码：S-PBGA-B432JESD-609代码：e0
可配置逻辑块数量：784等效关口数量：92000
输入次数：338逻辑单元数量：6272
输出次数：338端子数量：432
最高工作温度：85 °C最低工作温度：-40 °C
组织：784 CLBS, 92000 GATES封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA432,31X31,50
封装形状：SQUARE封装形式：GRID ARRAY
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY认证状态：Not Qualified
子类别：Field Programmable Gate Arrays最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：1.27 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

OR3T125-6BC432I 数据手册

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Data Sheet  
June 1999  
ORCA Series 3C and 3T FPGAs  
System-Level Features  
phase and duty cycle for input clock rates from  
5 MHz to 120 MHz. The PCM may be combined with  
FPGA logic to create complex functions, such as dig-  
ital phase-locked loops (DPLL), frequency counters,  
and frequency synthesizers or clock doublers. Two  
PCMs are provided per device.  
System-level features reduce glue logic requirements  
and make a system on a chip possible. These features  
in the ORCA Series 3 include:  
■ Full PCI local bus compliance.  
■ True, internal, 3-state, bidirectional buses with simple  
■ Dual-use microprocessor interface (MPI) can be  
used for configuration, readback, device control, and  
device status, as well as for a general-purpose inter-  
face to the FPGA. Glueless interface to i960* and  
PowerPC† processors with user-configurable  
address space provided.  
control provided by the SLIC.  
■ 32 x 4 RAM per PFU, configurable as single- or dual-  
port at >176 MHz. Create large, fast RAM/ROM  
blocks (128 x 8 in only eight PFUs) using the SLIC  
decoders as bank drivers.  
■ Parallel readback of configuration data capability with  
* i960 is a registered trademark of Intel Corporation.  
†PowerPC is a registered trademark of International Business  
Machines Corporation.  
the built-in microprocessor interface.  
■ Programmable clock manager (PCM) adjusts clock  
Table 2. ORCA Series 3 System Performance  
Parameter  
Speed  
# PFUs  
Unit  
-4  
78  
78  
-5  
-6  
-7  
168  
168  
16-bit Loadable Up/Down Counter  
16-bit Accumulator  
2
2
102  
102  
131  
131  
MHz  
MHz  
8 x 8 Parallel Multiplier:  
Multiplier Mode, Unpipelined1  
ROM Mode, Unpipelined2  
Multiplier Mode, Pipelined3  
32 x 16 RAM (synchronous):  
Single-port, 3-state Bus4  
Dual-port5  
11.5  
8
15  
19  
51  
76  
25  
66  
104  
30  
80  
127  
38  
102  
166  
MHz  
MHz  
MHz  
4
4
97  
127  
127  
166  
151  
203  
192  
253  
MHz  
MHz  
128 x 8 RAM (synchronous):  
Single-port, 3-state Bus4  
Dual-port5  
8
8
88  
88  
116  
116  
139  
139  
176  
176  
MHz  
MHz  
8-bit Address Decode (internal):  
Using Softwired LUTs  
Using SLICs6  
0.25  
0
4.87  
2.35  
3.66  
1.82  
2.58  
1.23  
2.03  
0.99  
ns  
ns  
32-bit Address Decode (internal):  
Using Softwired LUTs  
Using SLICs7  
2
0
2
16.06 12.07 9.01  
6.91 5.41 4.21  
16.06 12.07 9.01  
7.03  
3.37  
7.03  
ns  
ns  
ns  
36-bit Parity Check (internal)  
1. Implemented using 8 x 1 multiplier mode (unpipelined), register-to-register, two 8-bit inputs, one 16-bit output.  
2. Implemented using two 32 x 12 ROMs and one 12-bit adder, one 8-bit input, one fixed operand, one 16-bit output.  
3. Implemented using 8 x 1 multiplier mode (fully pipelined), two 8-bit inputs, one 16-bit output (7 of 15 PFUs contain only pipelining registers).  
4. Implemented using 32 x 4 RAM mode with read data on 3-state buffer to bidirectional read/write bus.  
5. Implemented using 32 x 4 dual-port RAM mode.  
6. Implemented in one partially occupied SLIC with decoded output set up to CE in same PLC.  
7. Implemented in five partially occupied SLICs.  
6
Lucent Technologies Inc.  
1...3456789...210

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