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OPA615ID PDF预览

OPA615ID

更新时间: 2024-02-07 08:08:14
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
26页 628K
描述
Wide-Bandwidth, DC Restoration Circuit

OPA615ID 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOIC-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.33.00.01Factory Lead Time:1 week
风险等级:5.35Is Samacsys:N
放大器类型:SAMPLE AND HOLD CIRCUIT最大模拟输入电压:3 V
最小模拟输入电压:-3 VJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
湿度敏感等级:2负供电电压上限:-6.5 V
标称负供电电压 (Vsup):-5 V功能数量:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260认证状态:Not Qualified
采样并保持/跟踪并保持:SAMPLE座面最大高度:1.75 mm
子类别:Sample and Hold Circuit供电电压上限:6.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.91 mm
Base Number Matches:1

OPA615ID 数据手册

 浏览型号OPA615ID的Datasheet PDF文件第17页浏览型号OPA615ID的Datasheet PDF文件第18页浏览型号OPA615ID的Datasheet PDF文件第19页浏览型号OPA615ID的Datasheet PDF文件第21页浏览型号OPA615ID的Datasheet PDF文件第22页浏览型号OPA615ID的Datasheet PDF文件第23页 
OPA615  
www.ti.com  
SBOS299BFEBRUARY 2004REVISED JULY 2005  
Fast Pulse Peak Detector  
To illustrate how the digitization is realized in the  
Figure 45 circuit, Figure 46 shows  
a 100kHz  
A circuit similar to that shown in Figure 47 (the  
integrator for ns-pulses) can be devised to detect and  
isolate positive pulses from negative pulses. This  
circuit, shown in Figure 48, uses the OPA615 as well  
as the BUF602. This circuit makes use of diodes to  
isolate the positive-going pulses from the nega-  
tive-going pulses and charge-different capacitors.  
sinewave being sampled at a rate of 1MHz. The  
output signal used here is the IOUT output driving a  
50load.  
1MHz SAMPLE−AND−HOLD OF A 100kHz SINEWAVE  
5
4
3
2
1
50  
Hold Control  
100  
VOUT  
+1  
8
4
27pF  
BUF602  
100  
+2.5  
+1.5  
+0.5  
0
12  
150  
10  
11  
7
100  
VIN  
4
SOTA  
OTA  
2
3
50  
0.5  
1.5  
2.5  
50  
27pF  
OPA615  
+VOUT  
300  
µ
Time (1 s/div)  
Figure 46. 1MHz Sample-and-Hold of a 100kHz  
Sine Wave  
Figure 48. Fast Bipolar Peak Detector  
Phase Detector for Fast PLL Systems  
Integrator for ns-Pulses  
Figure 49 shows the circuit for a phase detector for  
fast PLL systems. Given a reference pulse train fREF  
and a pulse train input signal fIN out of phase, the  
SOTA of the OPA615 acts in this circuit as a  
comparator, either charging or discharging the ca-  
pacitor. This voltage is then buffered by the OTA and  
fed to the VCO.  
The integrator for ns-pulses using the OPA615  
(shown in Figure 47) makes use of the fast  
comparator and its current-mode output. Placing the  
hold-control high, a narrow pulse charges the capaci-  
tor, increasing the average output voltage. To  
minimize ripples at the inverting input and maximize  
the capacitor charge, a T-network is used in the  
feedback path.  
Hold Control  
12  
OPA615  
11  
fREF  
100  
150  
12  
OTA  
2
OTA  
10  
11  
7
SOTA  
VIN  
10  
75  
4
3
100  
fIN  
4
7
SOTA  
75  
3
CINT  
2
50  
27pF  
VOUT  
75  
50  
+5V  
VOUT  
820  
620  
µ
1
F
fIN  
N
fOUT  
fREF  
fIN  
VCO  
Figure 47. Integrator for ns-Pulses  
VOUT  
IOUT  
Phase  
fREF  
VOU T  
fOUT = fREF x N  
Figure 49. Phase Detector For Fast PLL-Systems  
20  
 
 
 
 

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