DATA SHEET
www.onsemi.com
MOSFET – Power, Single,
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
80 V
9.5 mꢃ @ 10 V
68 A
80 V, 9.5 mW, 68 A
N−Channel
NVTFS6H850N
D (5 − 8)
Features
• Small Footprint (3.3 x 3.3 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• NVTFS6H850NWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
S (1, 2, 3)
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
1
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
WDFN8 3.3x3.3, 0.65P
CASE 511AB
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
(Notes 1, 2, 3, 4)
Steady
State
T
T
= 25°C
I
D
68
A
C
ꢀ
JC
= 100°C
48
C
WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL WF)
Power Dissipation
T
T
= 25°C
P
107
53
W
A
CASE 515AN
C
D
R
(Notes 1, 2, 3)
ꢀ
JC
= 100°C
C
Continuous Drain
Current R
Steady T = 25°C
I
D
11
A
State
ꢀ
JA
MARKING DIAGRAM
T = 100°C
A
8.4
(Notes 1 & 3, 4)
1
S
S
S
G
D
D
D
D
Power Dissipation
T = 25°C
P
3.2
1.6
300
W
A
D
XXXX
AYWWG
G
R
(Notes 1, 3)
ꢀ
JA
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ꢁ s
I
DM
A
A
p
Operating Junction and Storage Temperature
T , T
J
−55 to
+175
°C
stg
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
Source Current (Body Diode)
I
S
89
A
Single Pulse Drain−to−Source Avalanche
E
271
mJ
WW
G
= Work Week
= Pb−Free Package
AS
Energy (I
= 3.4 A)
L(pk)
(Note: Microdot may be in either location)
Lead Temperature for Soldering Purposes
(1/8″ from Case for 10 s)
T
260
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
package dimensions section on page 5 of this data sheet.
Parameter
Symbol
Value
1.4
Unit
Junction−to−Case − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 3)
R
°C/W
ꢀ
ꢀ
JC
R
47
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (ꢂ ) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
April, 2022 − Rev. 3
NVTFS6H850N/D