Datasheet > NJU7118F3

NJU7118F3

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
NPC		/
页数	文件大小	规格书
3页	69K
描述
LOW POWER AND LOW OFFSET VOLTAGE SUPER SMALL-SIZED SINGLE C-MOS COMPALATOR

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NJU7118F3 数据手册

NJU7118

!ABSOLUTE MAXIMUM RATINGS

(Ta=25°C)

PARAMETER

Supply Voltage

SYMBOL

V_DD

RATING

7.0

UNIT

Differential Input Voltage

Common Mode Input Voltage

Power Dissipation

V_ID

±7.0

(Note1)

V_IC

-0.3~7.0

250 (Note2)

-40~+85

P_D

°C

Operating Temperature

Storage Temperature

Topr

Tstg

-55~+125

Note1) If the supply voltage (V_DD) is less than 7.0V, the input voltage must not over the V_DDlevel though 7.0V

is limit specified.

Note2) The power dissipation is value mounted on aglass epoxy board (FR-4) in size of 50x50x1.6 millimeters

square.

Note3) Decoupling capacitor should be connected between V_DDand V_SSdue to the stabilized operation for the

circuit.

!ELECTRICAL CHARACTERISTICS

(V_DD=3.0V,R_L=∞,Ta=25°C)

PARAMETER

Operating Voltage

Input Offset Voltage

Input Offset Current

SYMBOL

V_DD

CONDITIONS

MIN

TYP

MAX

UNIT

1.0

5.5

V_IO

V_IN=V_DD/2

I_IO

I_IB

Input Bias Current

Input Common Mode

V_ICM

0~2.5

Voltage Range

Low Level Output Voltage

Operating Current

V_OL

I_DD

I_OL=+5mA

0.3

(V_DD=3.0V,f=10kHz,C_L=15pF,Ta=25°C)

PARAMETER

SYMBOL

t_PLH

CONDITIONS

MIN

TYP

MAX

UNIT

Propagation Delay

Low to High

Over Drive=100mV

540

Propagation Delay

High to Low

t_PHL

t_THL

Over Drive=100mV

190

Output Signal Falling Time

01/03/28 ( 2 / 3 )

123

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