Datasheet > NJU#7706F27A2-TE2

NJU#7706F27A2-TE2

更新时间： 2024-02-22 22:53:30

品牌	Logo	应用领域
NJRC		/
页数	文件大小	规格书
10页	81K
描述
Power Management Circuit,

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技术参数
数据手册

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NJU#7706F27A2-TE2 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.72	Base Number Matches：	1

NJU#7706F27A2-TE2 数据手册

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NJU7706/07

ꢀ Functional Description

(1) Basic operation

Supply voltage

(V_DD)

(1) When supply voltage(V_DD) drops below

detection voltage(V_DET), Output voltage(V_OUT

Hysteresis voltage

(V_HYS

)

Release voltage

changes "H" to "L" to alert reset state.

(2) The reset state is kept while V_DDis lower than

release voltage. The release voltage is a sum

of V_DETand Hysterisis voltage (V_HYS). Please

refer to the (*7) below.

(V_DET+ V_HYS

)

Detection voltage

(V_DET

)

Minimum operation

voltage (V_OPL

)

V_SS

(3) When V_DDbecomes higher than the release

voltage and reset release delay time fixed by

internal is past, then V_OUTchanges from "L" to

"H" to resume normal state.

Output voltage

(V_OUT

)

(*7) V_HYSis to avoid unstable V_OUTstate caused

by rapid voltage change at nearby V_DET

V_SS

Delaytime

(*8): C-MOS output product (NJU7707) : When V_DDless than V_OPL, V_OUTis free of the shaded region.

(2) Description of Manual Reset

Reset signal can output independently with MR.

Logic of MR

Active "L"

Active "H"

Operation

V_MR= "L" => Reset "ON"

V_MR= "H" => Reset "ON"

If Manual Reset is not required, please connect MR terminal as following.

Logic of MR

Active "L"

Active "H"

Connection

Connect MR terminal to V_DDor open

Connect MR terminal to GNDor open

[CAUTION]

The specifications on this databook are only

given for information , without any guarantee

as regards either mistakes or omissions. The

application circuits in this databook are

described only to show representative usages

of the product and not intended for the

guarantee or permission of any right including

the industrial rights.

Ver.2007-08-03

- 10 -

1...7 8 910

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